[PATCH] wifi: mt76: mt7925: add regulatory wiphy self manager support
JB Tsai
jb.tsai at mediatek.com
Wed Jun 3 00:53:31 PDT 2026
From: Charlie-cy Wu <Charlie-cy.Wu at mediatek.com>
Introduce regulatory wiphy self-managed mode support for MT7925,
allowing the driver to manage its own regulatory domain independently
from the kernel's regulatory framework.
Signed-off-by: Charlie-cy Wu <Charlie-cy.Wu at mediatek.com>
---
.../net/wireless/mediatek/mt76/mt7925/mcu.c | 3 +-
.../net/wireless/mediatek/mt76/mt7925/regd.c | 204 ++++++++++++++++--
.../net/wireless/mediatek/mt76/mt7925/regd.h | 54 +++++
drivers/net/wireless/mediatek/mt76/mt792x.h | 2 +
4 files changed, 244 insertions(+), 19 deletions(-)
diff --git a/drivers/net/wireless/mediatek/mt76/mt7925/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7925/mcu.c
index 37cdf3e8a067..56b265602faa 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7925/mcu.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7925/mcu.c
@@ -3457,7 +3457,8 @@ int mt7925_mcu_set_clc(struct mt792x_dev *dev, u8 *alpha2,
/* submit all clc config */
for (i = 0; i < ARRAY_SIZE(phy->clc); i++) {
- if (i == MT792x_CLC_BE_CTRL)
+ if (i == MT792x_CLC_BE_CTRL ||
+ i == MT792x_CLC_REGD)
continue;
ret = __mt7925_mcu_set_clc(dev, alpha2, env_cap,
diff --git a/drivers/net/wireless/mediatek/mt76/mt7925/regd.c b/drivers/net/wireless/mediatek/mt76/mt7925/regd.c
index 16f56ee879d4..bbd8f2d008c0 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7925/regd.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7925/regd.c
@@ -9,6 +9,15 @@ static bool mt7925_disable_clc;
module_param_named(disable_clc, mt7925_disable_clc, bool, 0644);
MODULE_PARM_DESC(disable_clc, "disable CLC support");
+static const struct ieee80211_regdomain mt7925_regd_ww = {
+ .n_reg_rules = 1,
+ .alpha2 = "00",
+ .reg_rules = {
+ /* IEEE 802.11b/g, channels 1..11 */
+ REG_RULE(2412 - 10, 2462 + 10, 40, 6, 20, 0),
+ }
+};
+
bool mt7925_regd_clc_supported(struct mt792x_dev *dev)
{
if (mt7925_disable_clc ||
@@ -128,35 +137,37 @@ mt7925_regd_channel_update(struct wiphy *wiphy, struct mt792x_dev *dev)
}
}
-int mt7925_mcu_regd_update(struct mt792x_dev *dev, u8 *alpha2,
- enum environment_cap country_ie_env)
+static int mt7925_mcu_apply_regd(struct mt792x_dev *dev, u8 *alpha2,
+ enum environment_cap env)
{
struct ieee80211_hw *hw = mt76_hw(dev);
struct wiphy *wiphy = hw->wiphy;
- int ret = 0;
-
- dev->regd_in_progress = true;
-
- mt792x_mutex_acquire(dev);
- if (!dev->regd_change)
- goto err;
+ int ret;
- ret = mt7925_mcu_set_clc(dev, alpha2, country_ie_env);
+ ret = mt7925_mcu_set_clc(dev, alpha2, env);
if (ret < 0)
- goto err;
+ return ret;
mt7925_regd_be_ctrl(dev, alpha2);
mt7925_regd_channel_update(wiphy, dev);
ret = mt7925_mcu_set_channel_domain(hw->priv);
if (ret < 0)
- goto err;
+ return ret;
- ret = mt7925_set_tx_sar_pwr(hw, NULL);
- if (ret < 0)
- goto err;
+ return mt7925_set_tx_sar_pwr(hw, NULL);
+}
-err:
+int mt7925_mcu_regd_update(struct mt792x_dev *dev, u8 *alpha2,
+ enum environment_cap country_ie_env)
+{
+ int ret = 0;
+
+ dev->regd_in_progress = true;
+
+ mt792x_mutex_acquire(dev);
+ if (dev->regd_change)
+ ret = mt7925_mcu_apply_regd(dev, alpha2, country_ie_env);
mt792x_mutex_release(dev);
dev->regd_change = false;
dev->regd_in_progress = false;
@@ -197,11 +208,162 @@ void mt7925_regd_notifier(struct wiphy *wiphy, struct regulatory_request *req)
/* postpone the mcu update to resume */
return;
+ if (MT7925_REGD_SUPPORTED(&dev->phy)) {
+ mt7925_regd_update(&dev->phy, req->alpha2);
+
+ return;
+ }
+
mt7925_mcu_regd_update(dev, req->alpha2,
req->country_ie_env);
return;
}
+static struct sk_buff *
+mt7925_regd_query_regdb(struct mt792x_phy *phy, char *alpha2)
+{
+ struct wiphy *wiphy = phy->mt76->hw->wiphy;
+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
+ struct mt7925_clc *clc = phy->clc[MT792x_CLC_REGD];
+ struct mt7925_regd_query_req *req;
+ struct mt7925_regd_cc *regd_cc;
+ struct sk_buff *ret_skb = NULL;
+ u8 *pos, *last_pos;
+ int ret = 0;
+
+ if (!clc)
+ return NULL;
+
+ pos = clc->data;
+ last_pos = pos + le32_to_cpu(clc->len) - sizeof(struct mt7925_clc);
+ while (pos < last_pos) {
+ u32 req_len = 0;
+ u32 rules_len = 0;
+ u32 sign_len = 4;
+
+ if (pos + sizeof(*regd_cc) > last_pos)
+ break;
+
+ regd_cc = (struct mt7925_regd_cc *)pos;
+ rules_len = sizeof(struct mt7925_regd_rule_header) +
+ sizeof(struct mt7925_regd_rule) *
+ le32_to_cpu(regd_cc->n_reg_rules);
+
+ if (pos + sizeof(*regd_cc) + rules_len + sign_len > last_pos)
+ break;
+
+ pos += sizeof(*regd_cc) + rules_len + sign_len;
+ if (memcmp(regd_cc->alpha2, alpha2, 2))
+ continue;
+
+ req_len = sizeof(*req) + rules_len + sign_len;
+ req = devm_kmalloc(dev->mt76.dev, req_len, GFP_KERNEL);
+
+ if (!req)
+ return NULL;
+
+ req->tag = cpu_to_le16(0x6);
+ req->len = cpu_to_le16(req_len - 4);
+ req->ver = regd_cc->ver;
+ req->sign_type = regd_cc->sign_type;
+ req->size = cpu_to_le32(rules_len + sign_len);
+ req->n_reg_rules = regd_cc->n_reg_rules;
+
+ memcpy(req->alpha2, regd_cc->alpha2, 2);
+ memcpy(req->data, regd_cc->data, rules_len + sign_len);
+
+ ret = mt76_mcu_send_and_get_msg(&dev->mt76,
+ MCU_UNI_CMD(SET_POWER_LIMIT),
+ req, req_len, true, &ret_skb);
+ devm_kfree(dev->mt76.dev, req);
+
+ return ret < 0 ? NULL : ret_skb;
+ }
+
+ return NULL;
+}
+
+int mt7925_regd_update(struct mt792x_phy *phy, char *alpha2)
+{
+ struct wiphy *wiphy = phy->mt76->hw->wiphy;
+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
+ struct mt7925_regd_rule *mt7925_rule;
+ struct mt76_dev *mdev = &dev->mt76;
+ struct ieee80211_regdomain *regd;
+ struct ieee80211_reg_rule *rule;
+ struct mt7925_regd_rule_ev *ev;
+ int i, num_of_rules = 0;
+ struct sk_buff *skb;
+ int ret = 0;
+
+ if (dev->hw_full_reset)
+ return 0;
+
+ if (!MT7925_REGD_SUPPORTED(phy))
+ return -EOPNOTSUPP;
+
+ mt792x_mutex_acquire(dev);
+ skb = mt7925_regd_query_regdb(phy, alpha2);
+ mt792x_mutex_release(dev);
+
+ if (!skb)
+ return -EINVAL;
+
+ ev = (struct mt7925_regd_rule_ev *)(skb->data + 4);
+ num_of_rules = le32_to_cpu(ev->n_reg_rules);
+
+ if (!num_of_rules ||
+ WARN_ON_ONCE(num_of_rules > NL80211_MAX_SUPP_REG_RULES)) {
+ ret = -EINVAL;
+ goto err;
+ }
+
+ regd = kzalloc(struct_size(regd, reg_rules, num_of_rules), GFP_KERNEL);
+ if (!regd) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ for (i = 0; i < num_of_rules; i++) {
+ mt7925_rule = &ev->reg_rule[i];
+ rule = ®d->reg_rules[i];
+
+ rule->freq_range.start_freq_khz =
+ MHZ_TO_KHZ(mt7925_rule->start_freq);
+ rule->freq_range.end_freq_khz =
+ MHZ_TO_KHZ(mt7925_rule->end_freq);
+ rule->freq_range.max_bandwidth_khz =
+ MHZ_TO_KHZ(mt7925_rule->max_bw);
+ /* not used by fw */
+ rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
+ rule->power_rule.max_eirp = DBM_TO_MBM(22);
+ rule->flags = mt7925_rule->flags;
+ }
+
+ regd->n_reg_rules = num_of_rules;
+ regd->dfs_region = ev->dfs_region;
+
+ memcpy(regd->alpha2, alpha2, 2);
+ memcpy(mdev->alpha2, alpha2, 2);
+
+ dev->regd_change = true;
+ mt7925_mcu_regd_update(dev, alpha2, ENVIRON_ANY);
+
+ ret = regulatory_set_wiphy_regd(wiphy, regd);
+
+ kfree(regd);
+err:
+ dev_kfree_skb(skb);
+
+ if (ret < 0)
+ return regulatory_set_wiphy_regd(wiphy, &mt7925_regd_ww);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(mt7925_regd_update);
+
static bool
mt7925_regd_is_valid_alpha2(const char *alpha2)
{
@@ -240,7 +402,9 @@ int mt7925_regd_change(struct mt792x_phy *phy, char *alpha2)
if (!memcmp(alpha2, mdev->alpha2, 2))
return 0;
- if (phy->chip_cap & MT792x_CHIP_CAP_11D_EN) {
+ if (MT7925_REGD_SUPPORTED(phy)) {
+ return mt7925_regd_update(phy, alpha2);
+ } else if (phy->chip_cap & MT792x_CHIP_CAP_11D_EN) {
return regulatory_hint(wiphy, alpha2);
} else {
return mt7925_mcu_set_clc(dev, alpha2, ENVIRON_INDOOR);
@@ -255,7 +419,11 @@ int mt7925_regd_init(struct mt792x_phy *phy)
struct mt792x_dev *dev = mt792x_hw_dev(hw);
struct mt76_dev *mdev = &dev->mt76;
- if (phy->chip_cap & MT792x_CHIP_CAP_11D_EN) {
+ if (MT7925_REGD_SUPPORTED(phy)) {
+ wiphy->regulatory_flags |= REGULATORY_WIPHY_SELF_MANAGED |
+ REGULATORY_DISABLE_BEACON_HINTS;
+ return mt7925_regd_update(phy, "00");
+ } else if (phy->chip_cap & MT792x_CHIP_CAP_11D_EN) {
wiphy->regulatory_flags |= REGULATORY_COUNTRY_IE_IGNORE |
REGULATORY_DISABLE_BEACON_HINTS;
} else {
diff --git a/drivers/net/wireless/mediatek/mt76/mt7925/regd.h b/drivers/net/wireless/mediatek/mt76/mt7925/regd.h
index 0767f078862e..2feacf42dc22 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7925/regd.h
+++ b/drivers/net/wireless/mediatek/mt76/mt7925/regd.h
@@ -6,12 +6,66 @@
#include "mt7925.h"
+struct mt7925_regd_rule_header {
+ u8 alpha2[2];
+ u8 dfs_region;
+ u8 rsv[13];
+};
+
+struct mt7925_regd_rule {
+ u32 start_freq;
+ u32 end_freq;
+ u32 max_bw;
+ u32 eirp;
+ u32 flags;
+ u8 rsv[12];
+};
+
+struct mt7925_regd_cc {
+ u8 alpha2[2];
+ u8 ver;
+ u8 rsv;
+ __le32 n_reg_rules;
+ u8 sign_type;
+ u8 rsv1[7];
+ u8 data[];
+};
+
+struct mt7925_regd_rule_ev {
+ __le16 tag;
+ __le16 len;
+ __le32 n_reg_rules;
+ u8 dfs_region;
+ u8 rsv[15];
+ struct mt7925_regd_rule reg_rule[];
+};
+
+struct mt7925_regd_query_req {
+ u8 rsv[4];
+ __le16 tag;
+ __le16 len;
+ u8 ver;
+ u8 sign_type;
+ u8 rsv1[2];
+ __le32 size;
+ u8 alpha2[2];
+ u8 rsv2[2];
+ __le32 n_reg_rules;
+ u8 rsv3[64];
+ u8 data[];
+};
+
+#define MT7925_REGD_SUPPORTED(phy) \
+ (((phy)->chip_cap & MT792x_CHIP_CAP_REGD_EN) && \
+ (phy)->clc[MT792x_CLC_REGD])
+
int mt7925_mcu_regd_update(struct mt792x_dev *dev, u8 *alpha2,
enum environment_cap country_ie_env);
void mt7925_regd_be_ctrl(struct mt792x_dev *dev, u8 *alpha2);
void mt7925_regd_notifier(struct wiphy *wiphy, struct regulatory_request *req);
bool mt7925_regd_clc_supported(struct mt792x_dev *dev);
+int mt7925_regd_update(struct mt792x_phy *phy, char *alpha2);
int mt7925_regd_change(struct mt792x_phy *phy, char *alpha2);
int mt7925_regd_init(struct mt792x_phy *phy);
diff --git a/drivers/net/wireless/mediatek/mt76/mt792x.h b/drivers/net/wireless/mediatek/mt76/mt792x.h
index 4ff93f2cd624..cd81cc519ef4 100644
--- a/drivers/net/wireless/mediatek/mt76/mt792x.h
+++ b/drivers/net/wireless/mediatek/mt76/mt792x.h
@@ -29,6 +29,7 @@
#define MT792x_CHIP_CAP_RSSI_NOTIFY_EVT_EN BIT(1)
#define MT792x_CHIP_CAP_WF_RF_PIN_CTRL_EVT_EN BIT(3)
#define MT792x_CHIP_CAP_11D_EN BIT(4)
+#define MT792x_CHIP_CAP_REGD_EN BIT(5)
#define MT792x_CHIP_CAP_MLO_EN BIT(8)
#define MT792x_CHIP_CAP_MLO_EML_EN BIT(9)
@@ -75,6 +76,7 @@ enum {
MT792x_CLC_POWER,
MT792x_CLC_POWER_EXT,
MT792x_CLC_BE_CTRL,
+ MT792x_CLC_REGD,
MT792x_CLC_MAX_NUM,
};
--
2.18.0
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