[PATCH v7 18/34] pinctrl: airoha: remove not needed irq_type[] array

[Lorenzo Bianconi]

> irq_type[] array inside airoha_pinctrl_gpiochip structure is not
> actually necessary. Use trigger type from 'struct irq_data' instead.
> 
> Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy at iopsys.eu>

Acked-by: Lorenzo Bianconi <lorenzo at kernel.org>

> ---
>  drivers/pinctrl/airoha/pinctrl-airoha.c | 22 ++++++++--------------
>  1 file changed, 8 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/pinctrl/airoha/pinctrl-airoha.c b/drivers/pinctrl/airoha/pinctrl-airoha.c
> index df3a1d7c7b571..65447d7e5965a 100644
> --- a/drivers/pinctrl/airoha/pinctrl-airoha.c
> +++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
> @@ -382,8 +382,6 @@ struct airoha_pinctrl_gpiochip {
>  	const u32 *status;
>  	const u32 *level;
>  	const u32 *edge;
> -
> -	u32 irq_type[AIROHA_NUM_PINS];
>  };
>  
>  struct airoha_pinctrl_confs_info {
> @@ -2577,11 +2575,11 @@ static void airoha_irq_unmask(struct irq_data *data)
>  	u32 mask = GENMASK(2 * offset + 1, 2 * offset);
>  	u32 val = BIT(2 * offset);
>  
> -	if (WARN_ON_ONCE(data->hwirq >= ARRAY_SIZE(gpiochip->irq_type)))
> +	if (WARN_ON_ONCE(data->hwirq >= AIROHA_NUM_PINS))
>  		return;
>  
>  	gpiochip_enable_irq(gc, irqd_to_hwirq(data));
> -	switch (gpiochip->irq_type[data->hwirq]) {
> +	switch (irqd_get_trigger_type(data)) {
>  	case IRQ_TYPE_LEVEL_LOW:
>  		val = val << 1;
>  		fallthrough;
> @@ -2613,7 +2611,7 @@ static void airoha_irq_mask(struct irq_data *data)
>  	u8 index = data->hwirq / AIROHA_REG_GPIOCTRL_NUM_PIN;
>  	u32 mask = GENMASK(2 * offset + 1, 2 * offset);
>  
> -	if (data->hwirq >= ARRAY_SIZE(gpiochip->irq_type))
> +	if (data->hwirq >= AIROHA_NUM_PINS)
>  		return;
>  
>  	regmap_clear_bits(pinctrl->regmap, gpiochip->level[index], mask);
> @@ -2629,7 +2627,7 @@ static void airoha_irq_ack(struct irq_data *data)
>  	u8 offset = data->hwirq % AIROHA_PIN_BANK_SIZE;
>  	u8 index = data->hwirq / AIROHA_PIN_BANK_SIZE;
>  
> -	if (data->hwirq >= ARRAY_SIZE(gpiochip->irq_type))
> +	if (data->hwirq >= AIROHA_NUM_PINS)
>  		return;
>  
>  	regmap_write(pinctrl->regmap, gpiochip->status[index], BIT(offset));
> @@ -2637,28 +2635,24 @@ static void airoha_irq_ack(struct irq_data *data)
>  
>  static int airoha_irq_type(struct irq_data *data, unsigned int type)
>  {
> -	struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
> -	struct airoha_pinctrl *pinctrl = gpiochip_get_data(gc);
> -	struct airoha_pinctrl_gpiochip *gpiochip = &pinctrl->gpiochip;
> -
> -	if (data->hwirq >= ARRAY_SIZE(gpiochip->irq_type))
> +	if (data->hwirq >= AIROHA_NUM_PINS)
>  		return -EINVAL;
>  
>  	if (type == IRQ_TYPE_NONE) {
> -		gpiochip->irq_type[data->hwirq] = IRQ_TYPE_NONE;
> +		irqd_set_trigger_type(data, type);
>  		irq_set_handler_locked(data, handle_bad_irq);
>  
>  		return 0;
>  	}
>  
>  	if (type == IRQ_TYPE_PROBE) {
> -		if (gpiochip->irq_type[data->hwirq])
> +		if (irqd_get_trigger_type(data))
>  			return 0;
>  
>  		type = IRQ_TYPE_EDGE_BOTH;
>  	}
>  
> -	gpiochip->irq_type[data->hwirq] = type & IRQ_TYPE_SENSE_MASK;
> +	irqd_set_trigger_type(data, type);
>  	if (type & IRQ_TYPE_EDGE_BOTH)
>  		irq_set_handler_locked(data, handle_edge_irq);
>  	else
> -- 
> 2.53.0
> 
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