[PATCH v2 2/2] mips: dts: ralink: mt7621: add crypto offload support

[Sergio Paracuellos]

Hi Aleksander,

On Thu, Jan 1, 2026 at 6:21 PM Aleksander Jan Bajkowski <olek2 at wp.pl> wrote:
>
> Add support for the built-in cryptographic accelerator. This accelerator
> supports 3DES, AES (128/192/256 bit), ARC4, MD5, SHA1, SHA224, and SHA256.
> It also supports full IPSEC and TLS offload, but this feature isn't
> implemented in the driver.
>
> Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
> ---
>  arch/mips/boot/dts/ralink/mt7621.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
> index 0704eab4a80b..9ba28fa016fb 100644
> --- a/arch/mips/boot/dts/ralink/mt7621.dtsi
> +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
> @@ -361,6 +361,14 @@ cdmm: cdmm at 1fbf8000 {
>                 reg = <0x1fbf8000 0x8000>;
>         };
>
> +       crypto at 1e004000 {
> +               compatible = "mediatek,mt7621-eip93", "inside-secure,safexcel-eip93ies";
> +               reg = <0x1e004000 0x1000>;
> +
> +               interrupt-parent = <&gic>;
> +               interrupts = <GIC_SHARED 19 IRQ_TYPE_LEVEL_HIGH>;
> +       };
> +

AFAICS, the crypto engine for mt7621 has also a clock gate[0] and a
reset line[1]. These two are not present in this binding.

[0]: https://elixir.bootlin.com/linux/v6.18.2/source/include/dt-bindings/clock/mt7621-clk.h#L36
[1]: https://elixir.bootlin.com/linux/v6.18.2/source/include/dt-bindings/reset/mt7621-reset.h#L33

Best regards,
    Sergio Paracuellos

>         ethernet: ethernet at 1e100000 {
>                 compatible = "mediatek,mt7621-eth";
>                 reg = <0x1e100000 0x10000>;
> --
> 2.47.3
>