[PATCH v1 1/5] dt-bindings: thermal: mediatek: make interrupt only required for current SoCs
AngeloGioacchino Del Regno
angelogioacchino.delregno at collabora.com
Mon Oct 27 03:43:45 PDT 2025
Il 26/10/25 13:21, Frank Wunderlich ha scritto:
> From: Frank Wunderlich <frank-w at public-files.de>
>
> Upcoming MT7987 does not have a IRQ we have to make interrupt-property only
> required for current supported SoCs.
Hmm. Thermal sensor IP with no interrupt? Looks really strange.
This is odd, because LVTS always has multiple interrupts, and if this doesn't
actually feature any, it really feels like the hardware is broken somehow.
MediaTek, can you please confirm whether the LVTS IP in MT7987 is really
like that, or can you please give the right interrupt number to Frank?
Thanks,
Angelo
>
> Signed-off-by: Frank Wunderlich <frank-w at public-files.de>
> ---
> .../bindings/thermal/mediatek,lvts-thermal.yaml | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
> index 0259cd3ce9c5..7ec9c46eef22 100644
> --- a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
> +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml
> @@ -58,6 +58,16 @@ properties:
> allOf:
> - $ref: thermal-sensor.yaml#
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - mediatek,mt7988-lvts-ap
> + then:
> + required:
> + - interrupts
> +
> - if:
> properties:
> compatible:
> @@ -75,6 +85,9 @@ allOf:
> nvmem-cell-names:
> maxItems: 1
>
> + required:
> + - interrupts
> +
> - if:
> properties:
> compatible:
> @@ -91,10 +104,12 @@ allOf:
> nvmem-cell-names:
> minItems: 2
>
> + required:
> + - interrupts
> +
> required:
> - compatible
> - reg
> - - interrupts
> - clocks
> - resets
> - nvmem-cells
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