[PATCH net-next v3 4/4] net: airoha: Add the capability to allocate hfwd descriptors in SRAM

[Lorenzo Bianconi]

> On Wed, May 21, 2025 at 09:16:39AM +0200, Lorenzo Bianconi wrote:
> > In order to improve packet processing and packet forwarding
> > performances, EN7581 SoC supports consuming SRAM instead of DRAM for
> > hw forwarding descriptors queue.
> > For downlink hw accelerated traffic request to consume SRAM memory
> > for hw forwarding descriptors queue.
> > 
> > Signed-off-by: Lorenzo Bianconi <lorenzo at kernel.org>
> > ---
> >  drivers/net/ethernet/airoha/airoha_eth.c | 11 +----------
> >  drivers/net/ethernet/airoha/airoha_eth.h |  9 +++++++++
> >  drivers/net/ethernet/airoha/airoha_ppe.c |  6 ++++++
> >  3 files changed, 16 insertions(+), 10 deletions(-)
> > 
> > diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c
> > index 20e590d76735e72a1a538a42d2a1f49b882deccc..3cd56de716a5269b1530cff6d0ca3414d92ecb69 100644
> > --- a/drivers/net/ethernet/airoha/airoha_eth.c
> > +++ b/drivers/net/ethernet/airoha/airoha_eth.c
> > @@ -71,15 +71,6 @@ static void airoha_qdma_irq_disable(struct airoha_irq_bank *irq_bank,
> >  	airoha_qdma_set_irqmask(irq_bank, index, mask, 0);
> >  }
> >  
> > -static bool airhoa_is_lan_gdm_port(struct airoha_gdm_port *port)
> > -{
> > -	/* GDM1 port on EN7581 SoC is connected to the lan dsa switch.
> > -	 * GDM{2,3,4} can be used as wan port connected to an external
> > -	 * phy module.
> > -	 */
> > -	return port->id == 1;
> > -}
> > -
> >  static void airoha_set_macaddr(struct airoha_gdm_port *port, const u8 *addr)
> >  {
> >  	struct airoha_eth *eth = port->qdma->eth;
> > @@ -1128,7 +1119,7 @@ static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma)
> >  			LMGR_INIT_START | LMGR_SRAM_MODE_MASK |
> >  			HW_FWD_DESC_NUM_MASK,
> >  			FIELD_PREP(HW_FWD_DESC_NUM_MASK, HW_DSCP_NUM) |
> > -			LMGR_INIT_START);
> > +			LMGR_INIT_START | LMGR_SRAM_MODE_MASK);
> 
> Hi Lorenzo,

Hi Simon,

> 
> I'm wondering if setting the LMGR_SRAM_MODE_MASK bit (maybe a different
> name for the #define would be nice) is dependent on the SRAM region

I did this way because LMGR_SRAM_MODE_MASK is just a bit. Do you prefer
to do something like:

FIELD_PREP(LMGR_SRAM_MODE_MASK, 1)?

> being described in DT, as per code added above this line to this
> function by the previous patch in this series.

Are you referring to qdma0_buf/qdma1_buf memory regions?
https://patchwork.kernel.org/project/netdevbpf/patch/20250521-airopha-desc-sram-v3-1-a6e9b085b4f0@kernel.org/

If so, they are DRAM memory-regions and not SRAM ones. They are used for
hw forwarding buffers queue. SRAM is used for hw forwarding descriptor queue.

Regards,
Lorenzo

> 
> >  
> >  	return read_poll_timeout(airoha_qdma_rr, status,
> >  				 !(status & LMGR_INIT_START), USEC_PER_MSEC,
> > diff --git a/drivers/net/ethernet/airoha/airoha_eth.h b/drivers/net/ethernet/airoha/airoha_eth.h
> > index 3e03ae9a5d0d21c0d8d717f2a282ff06ef3b9fbf..b815697302bfdf2a6d115a9bbbbadc05462dbadb 100644
> > --- a/drivers/net/ethernet/airoha/airoha_eth.h
> > +++ b/drivers/net/ethernet/airoha/airoha_eth.h
> > @@ -597,6 +597,15 @@ u32 airoha_rmw(void __iomem *base, u32 offset, u32 mask, u32 val);
> >  #define airoha_qdma_clear(qdma, offset, val)			\
> >  	airoha_rmw((qdma)->regs, (offset), (val), 0)
> >  
> > +static inline bool airhoa_is_lan_gdm_port(struct airoha_gdm_port *port)
> > +{
> > +	/* GDM1 port on EN7581 SoC is connected to the lan dsa switch.
> > +	 * GDM{2,3,4} can be used as wan port connected to an external
> > +	 * phy module.
> > +	 */
> > +	return port->id == 1;
> > +}
> > +
> >  bool airoha_is_valid_gdm_port(struct airoha_eth *eth,
> >  			      struct airoha_gdm_port *port);
> >  
> > diff --git a/drivers/net/ethernet/airoha/airoha_ppe.c b/drivers/net/ethernet/airoha/airoha_ppe.c
> > index 2d273937f19cf304ab4b821241fdc3ea93604f0e..12d32c92717a6b4ba74728ec02bb2e166d4d9407 100644
> > --- a/drivers/net/ethernet/airoha/airoha_ppe.c
> > +++ b/drivers/net/ethernet/airoha/airoha_ppe.c
> > @@ -251,6 +251,12 @@ static int airoha_ppe_foe_entry_prepare(struct airoha_eth *eth,
> >  		else
> >  			pse_port = 2; /* uplink relies on GDM2 loopback */
> >  		val |= FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT, pse_port);
> > +
> > +		/* For downlink traffic consume SRAM memory for hw forwarding
> > +		 * descriptors queue.
> > +		 */
> > +		if (airhoa_is_lan_gdm_port(port))
> > +			val |= AIROHA_FOE_IB2_FAST_PATH;
> >  	}
> >  
> >  	if (is_multicast_ether_addr(data->eth.h_dest))
> > 
> > -- 
> > 2.49.0
> > 
> > 
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