[PATCH v2 09/13] media: platform: mediatek: add isp_7x utility

CK Hu (胡俊光) ck.hu at mediatek.com
Mon Jul 21 19:19:19 PDT 2025


On Mon, 2025-07-07 at 09:31 +0800, shangyao lin wrote:
> From: "shangyao.lin" <shangyao.lin at mediatek.com>
> 
> Introduce utility files for the MediaTek ISP7.x camsys driver. These utilities
> provide essential platform definitions, debugging tools, and management
> functions to support ISP operations and SCP communication.
> 
> Key functionalities include:
> - Hardware pipeline and register definitions for managing image processing
>   modules
> - Buffer management functions
> - Definitions of supported image formats for proper data handling
> - IPI and SCP communication structures for module state management and ISP
>   configuration
> - Metadata parameters for configuring image processing
> 
> Changes in v2:
> - Removed mtk_cam-dmadbg.h along with related code
> - Various fixes per review comments
> 
> Signed-off-by: shangyao.lin <shangyao.lin at mediatek.com>
> ---

[snip]

> +/*
> + *  A U T O  F O C U S
> + */
> +
> +/*
> + * struct mtk_cam_uapi_af_param - af statistic parameters
> + *  @roi: AF roi rectangle (in pixel) for AF statistic covered, including
> + *    x, y, width, height
> + *  @th_sat_g:  green channel pixel value saturation threshold (0~255)
> + *  @th_h[3]: horizontal AF filters response threshold (0~50) for H0, H1,
> + *    and H2
> + *  @th_v:  vertical AF filter response threshold (0~50)
> + *  @blk_pixel_xnum: horizontal number of pixel per block
> + *  @blk_pixel_ynum: vertical number of pixel per block
> + *  @fir_type: to select FIR filter by AF target type (0,1,2,3)
> + *  @iir_type: to select IIR filter by AF target type (0,1,2,3)
> + *  @data_gain[7]: gamma curve gain for AF source data
> + */
> +struct mtk_cam_uapi_af_param {

Move all uapi definition to uapi folder.
But I does not see driver use mtk_cam_uapi_af_param.
If this is useless. Drop it.

> +	struct mtk_cam_uapi_meta_rect roi;
> +	u32 th_sat_g;
> +	u32 th_h[3];
> +	u32 th_v;
> +	u32 blk_pixel_xnum;
> +	u32 blk_pixel_ynum;
> +	u32 fir_type;
> +	u32 iir_type;
> +	u32 data_gain[7];
> +} __packed;
> +

[snip]

> +/*
> + * struct mtk_cam_uapi_pdp_stats - statistics of pd
> + *
> + * @stats_src:     source width and heitgh of the statistics.
> + * @stride:     stride value used by
> + * @pdo_buf:     The buffer for PD statistic hardware output.
> + *
> + * This is the PD statistic returned to user.
> + */
> +struct mtk_cam_uapi_pdp_stats {

I does not see driver use mtk_cam_uapi_pdp_stats.
If this is useless. Drop it.

> +	struct  mtk_cam_uapi_meta_size stats_src;
> +	u32   stride;
> +	struct  mtk_cam_uapi_meta_hw_buf pdo_buf;
> +} __packed;
> +

[snip]

> +/*
> + * struct mtk_cam_uapi_tnc_stats - Tone2 statistic data for
> + *                 Mediatek proprietary algorithm
> + *
> + * @tncso_buf: The buffer for tnc statistic hardware output. The buffer size
> + *           is defined in MTK_CAM_UAPI_TNCSO_SIZE (680*510*2)
> + */
> +struct mtk_cam_uapi_tnc_stats {
> +	struct mtk_cam_uapi_meta_hw_buf tncso_buf;

It's weird that define one structure including only one structure.
Drop mtk_cam_uapi_tnc_stats.

> +} __packed;
> +
> +/*
> + * struct mtk_cam_uapi_tnch_stats - Tone3 statistic data for Mediatek
> + *                                  proprietary algorithm
> + *
> + * @tncsho_buf: The buffer for tnch statistic hardware output. The buffer size
> + *           is defined in MTK_CAM_UAPI_TNCSHO_SIZE (1544)
> + */
> +struct mtk_cam_uapi_tnch_stats {
> +	struct mtk_cam_uapi_meta_hw_buf tncsho_buf;

It's weird that define one structure including only one structure.
Drop mtk_cam_uapi_tnch_stats.

> +} __packed;
> +
> +/*
> + * struct mtk_cam_uapi_tncb_stats - Tone4 statistic data for Mediatek
> + *                                  proprietary algorithm
> + *
> + * @tncsbo_buf: The buffer for tncb statistic hardware output. The buffer size
> + *           is defined in MTK_CAM_UAPI_TNCSBO_SIZE (3888)
> + */
> +struct mtk_cam_uapi_tncb_stats {
> +	struct mtk_cam_uapi_meta_hw_buf tncsbo_buf;

It's weird that define one structure including only one structure.
Drop mtk_cam_uapi_tncb_stats.

> +} __packed;
> +
> +/*
> + * struct mtk_cam_uapi_tncy_stats - Tone3 statistic data for Mediatek
> + *                                  proprietary algorithm
> + *
> + * @tncsyo_buf: The buffer for tncy statistic hardware output. The buffer size
> + *           is defined in MTK_CAM_UAPI_TNCSYO_SIZE (68)
> + */
> +struct mtk_cam_uapi_tncy_stats {
> +	struct mtk_cam_uapi_meta_hw_buf tncsyo_buf;

It's weird that define one structure including only one structure.
Drop mtk_cam_uapi_tncy_stats.

> +} __packed;
> +
> +/*
> + * struct mtk_cam_uapi_act_stats - act statistic data for Mediatek
> + *                                  proprietary algorithm
> + *
> + * @actso_buf: The buffer for tncy statistic hardware output. The buffer size
> + *           is defined in MTK_CAM_UAPI_ACTSO_SIZE (768)
> + */
> +#define MTK_CAM_UAPI_ACTSO_SIZE (768)
> +struct mtk_cam_uapi_act_stats {
> +	struct mtk_cam_uapi_meta_hw_buf actso_buf;

It's weird that define one structure including only one structure.
Drop mtk_cam_uapi_act_stats.

> +} __packed;
> +

[snip]

> +/*
> + * Usage example: To print value of "MTK_CAM_BPC_BPC_FUNC_CON_BPC_BPC_LUT_BIT_EXTEND_EN" in "val"
> + * > printf("%x", GET_MTK_CAM(val, MTK_CAM_BPC_BPC_FUNC_CON_BPC_BPC_LUT_BIT_EXTEND_EN));
> + */
> +#define GET_MTK_CAM(val, field) (((val) & field##_MASK) >> \
> +				 field##_SHIFT)
> +/*
> + * Usage example: To set "val_of_bpc_lut_bit_extend_en" to bits
> + * of "MTK_CAM_BPC_BPC_FUNC_CON_BPC_BPC_LUT_BIT_EXTEND_EN" in "val"
> + * > val = SET_MTK_CAM(val, MTK_CAM_BPC_BPC_FUNC_CON_BPC_BPC_LUT_BIT_EXTEND_EN,
> + * val_of_bpc_lut_bit_extend_en);
> + */
> +#define SET_MTK_CAM(val, field, set_val) (((val) & ~field##_MASK) | \
> +					  (((set_val) << field##_SHIFT) & field##_MASK))
> +
> +/*
> + * Bit Feild of BPC_FUNC_CON: BPC_EN
> + * MTK_CAM_BPC_FUNC_CON_BPC_EN: [31, 31]
> + * Enable/disable for BPC Correction
> + * 1'd1: enable the function
> + * 1'd0: disable the function
> + */
> +#define MTK_CAM_BPC_FUNC_CON_BPC_EN_MASK   0x80000000

I can not find anywhere to use this.
If it is useless, drop it.
If it is usable, it seams a structure could simplify these definition.

struct bpc_ctrl {
	u32 bpc_lut_bit_extend_en:1;
	u32 reserved:27;
	u32 bpc_lut_en:1;
	u32 bpc_pdc_en:1;
	u32 bpc_ct_en:1;
	u32 bpc_en:1;
};

> +#define MTK_CAM_BPC_FUNC_CON_BPC_EN_SHIFT  31
> +
> +/*
> + * Bit Feild of BPC_FUNC_CON: BPC_CT_EN
> + * MTK_CAM_BPC_FUNC_CON_BPC_CT_EN: [30, 30]
> + * Enable/disable for Cross-Talk compensation
> + * 1'd1: enable
> + * 1'd0: disable
> + */
> +#define MTK_CAM_BPC_FUNC_CON_BPC_CT_EN_MASK   0x40000000
> +#define MTK_CAM_BPC_FUNC_CON_BPC_CT_EN_SHIFT  30
> +
> +/*
> + * Bit Feild of BPC_FUNC_CON: BPC_PDC_EN
> + * MTK_CAM_BPC_FUNC_CON_BPC_PDC_EN: [29, 29]
> + * Enable/disable for PDC correction
> + * 1'd1: enable
> + * 1'd0: disable
> + */
> +#define MTK_CAM_BPC_FUNC_CON_BPC_PDC_EN_MASK   0x20000000
> +#define MTK_CAM_BPC_FUNC_CON_BPC_PDC_EN_SHIFT  29
> +
> +/*
> + * Bit Feild of BPC_FUNC_CON: BPC_LUT_EN
> + * MTK_CAM_BPC_FUNC_CON_BPC_LUT_EN: [28, 28]
> + * Enable table lookup
> + * 1'd1:  enable BPC with default table mode
> + * 1'd0:  disable BPC with default table mode
> + */
> +#define MTK_CAM_BPC_FUNC_CON_BPC_LUT_EN_MASK   0x10000000
> +#define MTK_CAM_BPC_FUNC_CON_BPC_LUT_EN_SHIFT  28
> +
> +/*
> + * Bit Feild of BPC_FUNC_CON: BPC_LUT_BIT_EXTEND_EN
> + * MTK_CAM_BPC_FUNC_CON_BPC_LUT_BIT_EXTEND_EN: [0, 0]
> + * Enable table 24 bits mode
> + * 1'd1: Table format to be 24 bits
> + * 1'd0: @ the original format, tbale to be 16 bits mode
> + */
> +#define MTK_CAM_BPC_FUNC_CON_BPC_LUT_BIT_EXTEND_EN_MASK   0x00000001
> +#define MTK_CAM_BPC_FUNC_CON_BPC_LUT_BIT_EXTEND_EN_SHIFT  0
> +

[snip]

> +int mtk_cam_img_working_buf_pool_init(struct mtk_cam_ctx *ctx, int buf_num,
> +				      struct device *dev)

mtk_cam_img_working_buf_pool_init() is useless. Drop it.

> +{
> +	int i, ret;
> +	u32 working_buf_size;
> +	void *ptr;
> +	dma_addr_t addr;
> +	struct mtk_cam_device *cam = ctx->cam;
> +	struct mtk_cam_video_device *vdev;
> +
> +	if (buf_num > CAM_IMG_BUF_NUM) {
> +		dev_err(ctx->cam->dev,
> +			"%s: ctx(%d): image buffers number too large(%d)\n",
> +			__func__, ctx->stream_id, buf_num);
> +		WARN_ON(1);
> +		return 0;
> +	}
> +
> +	vdev = &ctx->pipe->vdev_nodes[MTK_RAW_MAIN_STREAM_OUT - MTK_RAW_SINK_NUM];
> +	working_buf_size = vdev->active_fmt.fmt.pix_mp.plane_fmt[0].sizeimage;
> +	INIT_LIST_HEAD(&ctx->img_buf_pool.cam_freeimglist.list);
> +	spin_lock_init(&ctx->img_buf_pool.cam_freeimglist.lock);
> +	ctx->img_buf_pool.cam_freeimglist.cnt = 0;
> +	ctx->img_buf_pool.working_img_buf_size = buf_num * working_buf_size;
> +	ptr = dma_alloc_coherent(cam->smem_dev,
> +				 ctx->img_buf_pool.working_img_buf_size,
> +				 &addr, GFP_KERNEL);
> +	if (!ptr)
> +		return -ENOMEM;
> +	ctx->img_buf_pool.working_img_buf_scp_addr = addr;
> +	ctx->img_buf_pool.working_img_buf_va = ptr;
> +	addr = dma_map_resource(dev, addr, ctx->img_buf_pool.working_img_buf_size,
> +				DMA_BIDIRECTIONAL, DMA_ATTR_SKIP_CPU_SYNC);
> +	if (dma_mapping_error(dev, addr)) {
> +		dev_err(dev, "failed to map scp iova\n");
> +		ret = -ENOMEM;
> +		goto fail_free_mem;
> +	}
> +	ctx->img_buf_pool.working_img_buf_iova = addr;
> +	dev_dbg(dev,
> +		"[%s] img working buf scp addr:%pad va:%pK iova: %pad size %d\n",
> +		__func__,
> +		&ctx->img_buf_pool.working_img_buf_scp_addr,
> +		ctx->img_buf_pool.working_img_buf_va,
> +		&ctx->img_buf_pool.working_img_buf_iova,
> +		ctx->img_buf_pool.working_img_buf_size);
> +
> +	for (i = 0; i < buf_num; i++) {
> +		struct mtk_cam_img_working_buf_entry *buf =
> +			&ctx->img_buf_pool.img_working_buf[i];
> +		int offset = i * working_buf_size;
> +
> +		buf->ctx = ctx;
> +		buf->img_buffer.va =
> +			ctx->img_buf_pool.working_img_buf_va + offset;
> +		buf->img_buffer.scp_addr =
> +			ctx->img_buf_pool.working_img_buf_scp_addr + offset;
> +		buf->img_buffer.iova =
> +			ctx->img_buf_pool.working_img_buf_iova + offset;
> +		buf->img_buffer.size = working_buf_size;
> +
> +		list_add_tail(&buf->list_entry,
> +			      &ctx->img_buf_pool.cam_freeimglist.list);
> +		ctx->img_buf_pool.cam_freeimglist.cnt++;
> +	}
> +
> +	dev_dbg(dev, "%s: ctx(%d): image buffers init, freebuf cnt(%d)\n",
> +		__func__, ctx->stream_id, ctx->img_buf_pool.cam_freeimglist.cnt);
> +	return 0;
> +
> +fail_free_mem:
> +	dma_free_coherent(cam->smem_dev, ctx->img_buf_pool.working_img_buf_size,
> +			  ctx->img_buf_pool.working_img_buf_va,
> +			  ctx->img_buf_pool.working_img_buf_scp_addr);
> +	return ret;
> +}
> +
> +void mtk_cam_img_working_buf_pool_release(struct mtk_cam_ctx *ctx,
> +					  struct device *dev)

Becasue mtk_cam_img_working_buf_pool_init is useless,
so mtk_cam_img_working_buf_pool_release() is useless. Drop it.

> +{
> +	struct mtk_cam_device *cam = ctx->cam;
> +
> +	dma_unmap_page_attrs(dev, ctx->img_buf_pool.working_img_buf_iova,
> +			     ctx->img_buf_pool.working_img_buf_size,
> +			     DMA_BIDIRECTIONAL,
> +			     DMA_ATTR_SKIP_CPU_SYNC);
> +	dma_free_coherent(cam->smem_dev, ctx->img_buf_pool.working_img_buf_size,
> +			  ctx->img_buf_pool.working_img_buf_va,
> +			  ctx->img_buf_pool.working_img_buf_scp_addr);
> +	dev_dbg(dev,
> +		"%s:ctx(%d):img working buf release, scp addr %pad va %pK iova %pad, sz %u\n",
> +		__func__, ctx->stream_id,
> +		&ctx->img_buf_pool.working_img_buf_scp_addr,
> +		ctx->img_buf_pool.working_img_buf_va,
> +		&ctx->img_buf_pool.working_img_buf_iova,
> +		ctx->img_buf_pool.working_img_buf_size);
> +}
> +
> +void mtk_cam_img_working_buf_put(struct mtk_cam_img_working_buf_entry *buf_entry)

mtk_cam_img_working_buf_put() is useless. Drop it.

> +{
> +	struct mtk_cam_ctx *ctx = buf_entry->ctx;
> +	int cnt;
> +
> +	spin_lock(&ctx->img_buf_pool.cam_freeimglist.lock);
> +
> +	list_add_tail(&buf_entry->list_entry,
> +		      &ctx->img_buf_pool.cam_freeimglist.list);
> +	cnt = ++ctx->img_buf_pool.cam_freeimglist.cnt;
> +
> +	spin_unlock(&ctx->img_buf_pool.cam_freeimglist.lock);
> +
> +	dev_dbg(ctx->cam->dev, "%s:ctx(%d):iova(0x%pad), free cnt(%d)\n",
> +		__func__, ctx->stream_id, &buf_entry->img_buffer.iova, cnt);
> +}
> +
> +struct mtk_cam_img_working_buf_entry *
> +mtk_cam_img_working_buf_get(struct mtk_cam_ctx *ctx)

mtk_cam_img_working_buf_get() is useless. Drop it.

> +{
> +	struct mtk_cam_img_working_buf_entry *buf_entry;
> +	int cnt;
> +
> +	/* get from free list */
> +	spin_lock(&ctx->img_buf_pool.cam_freeimglist.lock);
> +	if (list_empty(&ctx->img_buf_pool.cam_freeimglist.list)) {
> +		spin_unlock(&ctx->img_buf_pool.cam_freeimglist.lock);
> +
> +		dev_info(ctx->cam->dev, "%s:ctx(%d):no free buf\n",
> +			 __func__, ctx->stream_id);
> +		return NULL;
> +	}
> +
> +	buf_entry = list_first_entry(&ctx->img_buf_pool.cam_freeimglist.list,
> +				     struct mtk_cam_img_working_buf_entry,
> +				     list_entry);
> +	list_del(&buf_entry->list_entry);
> +	cnt = --ctx->img_buf_pool.cam_freeimglist.cnt;
> +
> +	spin_unlock(&ctx->img_buf_pool.cam_freeimglist.lock);
> +
> +	dev_dbg(ctx->cam->dev, "%s:ctx(%d):iova(0x%pad), free cnt(%d)\n",
> +		__func__, ctx->stream_id, &buf_entry->img_buffer.iova, cnt);
> +
> +	return buf_entry;
> +}
> +

[snip]

> +/* IRQ signal mask */
> +#define INT_ST_MASK_CAM (VS_INT_ST	 |\
> +			 TG_INT1_ST	 |\
> +			 TG_INT2_ST	 |\
> +			 EXPDON_ST       |\
> +			 HW_PASS1_DON_ST |\
> +			 SOF_INT_ST      |\
> +			 SW_PASS1_DON_ST)
> +
> +/* IRQ Error Mask */
> +#define INT_ST_MASK_CAM_ERR	(TG_OVRUN_ST		|\
> +				 TG_GBERR_ST		|\
> +				 CQ_DB_LOAD_ERR_ST	|\
> +				 CQ_MAIN_CODE_ERR_ST	|\
> +				 CQ_MAIN_VS_ERR_ST	|\
> +				 DMA_ERR_ST)
> +
> +/* camsys */
> +#define REG_CAMSYS_CG_SET				0x0004

REG_CAMSYS_CG_SET is useless. Drop it.

> +#define REG_CAMSYS_CG_CLR				0x0008

REG_CAMSYS_CG_CLR is useless. Drop it.

> +
> +#define REG_HALT1_EN					0x0350
> +#define REG_HALT2_EN					0x0354
> +#define REG_HALT3_EN					0x0358
> +#define REG_HALT4_EN					0x035c
> +#define REG_HALT5_EN					0x0360
> +#define REG_HALT6_EN					0x0364
> +#define REG_FLASH					0x03A0

REG_FLASH is useless. Drop it.

> +#define REG_ULTRA_HALT1_EN				0x03c0
> +#define REG_ULTRA_HALT2_EN				0x03c4
> +#define REG_ULTRA_HALT3_EN				0x03c8
> +#define REG_ULTRA_HALT4_EN				0x03cc
> +#define REG_ULTRA_HALT5_EN				0x03d0
> +#define REG_ULTRA_HALT6_EN				0x03d4
> +#define REG_PREULTRA_HALT1_EN				0x03f0
> +#define REG_PREULTRA_HALT2_EN				0x03f4
> +#define REG_PREULTRA_HALT3_EN				0x03f8
> +#define REG_PREULTRA_HALT4_EN				0x03fc
> +#define REG_PREULTRA_HALT5_EN				0x0400
> +#define REG_PREULTRA_HALT6_EN				0x0404
> +
> +/* Status check */
> +#define REG_CTL_EN					0x0000
> +#define REG_CTL_EN2					0x0004

REG_CTL_EN2 is useless. Drop it.

> +
> +/* DMA Enable Register, DMA_EN */
> +#define REG_CTL_MOD5_EN					0x0010

REG_CTL_MOD5_EN is useless. Drop it.

> +#define REG_CTL_MOD6_EN					0x0014



> +/* RAW input trigger*/
> +#define REG_CTL_RAWI_TRIG				0x00C0
> +
> +#define REG_CTL_MISC					0x0060
> +#define CTL_DB_EN					BIT(4)
> +
> +#define REG_CTL_SW_CTL					0x00C4
> +#define REG_CTL_START					0x00B0
> +
> +#define REG_CTL_RAW_INT_EN				0x0100

REG_CTL_RAW_INT_EN is useless. Drop it.

> +#define REG_CTL_RAW_INT_STAT				0x0104
> +#define REG_CTL_RAW_INT2_EN				0x0110

REG_CTL_RAW_INT2_EN is useless. Drop it.

> +#define REG_CTL_RAW_INT2_STAT				0x0114
> +#define REG_CTL_RAW_INT3_STAT				0x0124
> +#define REG_CTL_RAW_INT4_STAT				0x0134
> +#define REG_CTL_RAW_INT5_STAT				0x0144
> +#define REG_CTL_RAW_INT6_EN				0x0150
> +#define REG_CTL_RAW_INT6_STAT				0x0154
> +#define REG_CTL_RAW_INT7_EN				0x0160
> +#define REG_CTL_RAW_INT7_STAT				0x0164
> +
> +#define REG_CTL_RAW_MOD_DCM_DIS				0x0300

REG_CTL_RAW_MOD_DCM_DIS is useless. Drop it.

> +#define REG_CTL_RAW_MOD2_DCM_DIS			0x0304

REG_CTL_RAW_MOD2_DCM_DIS is useless. Drop it.

> +#define REG_CTL_RAW_MOD3_DCM_DIS			0x0308

REG_CTL_RAW_MOD3_DCM_DIS is useless. Drop it.

> +#define REG_CTL_RAW_MOD5_DCM_DIS			0x0310
> +#define REG_CTL_RAW_MOD6_DCM_DIS			0x0314
> +
> +#define REG_CTL_DBG_SET					0x00F0

REG_CTL_DBG_SET is useless. Drop it.

> +#define REG_CTL_DBG_PORT				0x00F4

REG_CTL_DBG_PORT is useless. Drop it.

> +#define REG_DMA_DBG_SEL					0x4070

REG_DMA_DBG_SEL is useless. Drop it.

> +#define REG_DMA_DBG_PORT				0x4074
> +#define REG_CTL_DBG_SET2				0x00F8
> +
> +#define REG_CTL_RAW_MOD_REQ_STAT			0x0340

REG_CTL_RAW_MOD_REQ_STAT is useless. Drop it.

> +#define REG_CTL_RAW_MOD2_REQ_STAT			0x0344

REG_CTL_RAW_MOD2_REQ_STAT is useless. Drop it.

> +#define REG_CTL_RAW_MOD3_REQ_STAT			0x0348

REG_CTL_RAW_MOD3_REQ_STAT is useless. Drop it.

> +#define REG_CTL_RAW_MOD4_REQ_STAT			0x034c

REG_CTL_RAW_MOD4_REQ_STAT is useless. Drop it.

> +#define REG_CTL_RAW_MOD5_REQ_STAT			0x0350

REG_CTL_RAW_MOD5_REQ_STAT is useless. Drop it.

> +#define REG_CTL_RAW_MOD6_REQ_STAT			0x0354

REG_CTL_RAW_MOD6_REQ_STAT is useless. Drop it.

> +
> +#define REG_CTL_RAW_MOD_RDY_STAT			0x0360

REG_CTL_RAW_MOD_RDY_STAT is useless. Drop it.

> +#define REG_CTL_RAW_MOD2_RDY_STAT			0x0364

REG_CTL_RAW_MOD2_RDY_STAT is useless. Drop it.

> +#define REG_CTL_RAW_MOD3_RDY_STAT			0x0368

REG_CTL_RAW_MOD3_RDY_STAT is useless. Drop it.

> +#define REG_CTL_RAW_MOD4_RDY_STAT			0x036c

REG_CTL_RAW_MOD4_RDY_STAT is useless. Drop it.

> +#define REG_CTL_RAW_MOD5_RDY_STAT			0x0370

REG_CTL_RAW_MOD5_RDY_STAT is useless. Drop it.

> +#define REG_CTL_RAW_MOD6_RDY_STAT			0x0374

REG_CTL_RAW_MOD6_RDY_STAT is useless. Drop it.

> +
> +#define REG_CQ_EN					0x0400
> +#define REG_SCQ_START_PERIOD				0x0408
> +#define REG_CQ_THR0_CTL					0x0410
> +#define REG_CQ_SUB_CQ_EN				0x06B0
> +#define REG_CQ_SUB_THR0_CTL				0x06C0
> +

[snip]

> +#define REG_TG_INTER_ST					0x073C
> +/* use this MASK to extract TG_CAM_CS from TG_INTER_ST */
> +#define TG_CAM_CS_MASK					0x3f00
> +#define TG_IDLE_ST					BIT(8)
> +
> +#define REG_TG_FRMSIZE_ST				0x0738

REG_TG_FRMSIZE_ST is useless. Drop it.

> +#define REG_TG_DCIF_CTL					0x075C
> +#define TG_DCIF_EN					BIT(16)
> +
> +#define REG_TG_FRMSIZE_ST_R				0x076C

REG_TG_FRMSIZE_ST_R is useless. Drop it.

> +#define REG_TG_TIME_STAMP				0x0778
> +#define REG_TG_TIME_STAMP_CNT				0x077C
> +
> +/* tg flash */
> +#define	REG_TG_XENON_FLASH_CTL				0x0780
> +#define REG_TG_XENON_FLASH_OFFSET			0x0784
> +#define REG_TG_XENON_FLASH_HIGH_WIDTH			0x0788
> +#define REG_TG_XENON_FLASH_LOW_WIDTH			0x078C
> +#define	REG_TG_IR_FLASH_CTL				0x0798
> +#define REG_TG_IR_FLASH_OFFSET				0x079C
> +#define REG_TG_IR_FLASH_HIGH_WIDTH			0x07A0
> +#define REG_TG_IR_FLASH_LOW_WIDTH			0x07A4
> +
> +/* for raw & yuv's dma top base */
> +#define CAMDMATOP_BASE					0x4000

CAMDMATOP_BASE is useless. Drop it.

Regards,
CK

> +
> +#define REG_DMA_SOFT_RST_STAT				0x4068
> +#define REG_DMA_SOFT_RST_STAT2				0x406C
> +#define REG_DMA_DBG_CHASING_STATUS			0x4098
> +#define REG_DMA_DBG_CHASING_STATUS2			0x409c
> +




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