[PATCH v1 03/10] ufs: host: mediatek: Add memory barrier for ref-clk control

[peter.wang at mediatek.com]

From: Peter Wang <peter.wang at mediatek.com>

This patch adds a memory barrier to ensure that the ref-clk on/off control
register is fully written before it is read. This change is necessary to
maintain proper synchronization and prevent potential issues with register
access.

Signed-off-by: Peter Wang <peter.wang at mediatek.com>
---
 drivers/ufs/host/ufs-mediatek.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 3b3c3a1b2c42..1e5cc88127b4 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -336,6 +336,12 @@ static int ufs_mtk_setup_ref_clk(struct ufs_hba *hba, bool on)
 		ufshcd_writel(hba, REFCLK_RELEASE, REG_UFS_REFCLK_CTRL);
 	}
 
+	/*
+	 * Make sure that ref-clk on/off control register
+	 * is writed done before read it.
+	 */
+	mb();
+
 	/* Wait for ack */
 	timeout = ktime_add_us(ktime_get(), REFCLK_REQ_TIMEOUT_US);
 	do {
-- 
2.45.2