[PATCH v9 02/13] dt-bindings: net: mediatek,net: allow up to 8 IRQs
Frank Wunderlich
linux at fw-web.de
Wed Jul 9 04:09:38 PDT 2025
From: Frank Wunderlich <frank-w at public-files.de>
Increase the maximum IRQ count to 8 (4 FE + 4 RSS/LRO).
Frame-engine-IRQs (max 4):
MT7621, MT7628: 1 FE-IRQ
MT7622, MT7623: 3 FE-IRQs (only two used by the driver for now)
MT7981, MT7986, MT7988: 4 FE-IRQs (only two used by the driver for now)
Mediatek Filogic SoCs (mt798x) have 4 additional IRQs for RSS and/or
LRO. So MT798x have 8 IRQs in total.
MT7981 does not have a ethernet-node yet.
MT7986 Ethernet node is updated with RSS/LRO IRQs in this series.
MT7988 Ethernet node is added in this series.
Signed-off-by: Frank Wunderlich <frank-w at public-files.de>
---
v9:
- set interrupt minitems to 8 for filogic
- mt7981 does not have a ethernet node yet, so no ABI break
- devicetree for mt7986 is updated later in this series, ABI-Break,
but RSS/LRO should use interrupt names and is simply disabled when
using older DT
- extend mt7986 example with PDMA-IRQs because minItems now 8
v8: separate irq-count change from interrupt-names patch
---
.../devicetree/bindings/net/mediatek,net.yaml | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml
index 175d1d011dc6..99dc0401eb9a 100644
--- a/Documentation/devicetree/bindings/net/mediatek,net.yaml
+++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml
@@ -40,7 +40,7 @@ properties:
interrupts:
minItems: 1
- maxItems: 4
+ maxItems: 8
power-domains:
maxItems: 1
@@ -272,7 +272,7 @@ allOf:
then:
properties:
interrupts:
- minItems: 4
+ minItems: 8
clocks:
minItems: 15
@@ -310,7 +310,7 @@ allOf:
then:
properties:
interrupts:
- minItems: 4
+ minItems: 8
clocks:
minItems: 15
@@ -348,7 +348,7 @@ allOf:
then:
properties:
interrupts:
- minItems: 4
+ minItems: 8
clocks:
minItems: 24
@@ -507,7 +507,11 @@ examples:
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
clocks = <ðsys CLK_ETH_FE_EN>,
<ðsys CLK_ETH_GP2_EN>,
<ðsys CLK_ETH_GP1_EN>,
--
2.43.0
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