[PATCH] arm64: dts: mediatek: mt8188-geralt: Enable first SCP core

[Fei Shao]

On Tue, Aug 12, 2025 at 8:39 PM Chen-Yu Tsai <wenst at chromium.org> wrote:
>
> The first SCP core is used to drive the video decoder and encoders.
>
> Signed-off-by: Chen-Yu Tsai <wenst at chromium.org>
> ---
>  arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
> index c5254ae0bb99..10764786bc21 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi
> @@ -164,6 +164,12 @@ reserved_memory: reserved-memory {
>                 #size-cells = <2>;
>                 ranges;
>
> +               scp_mem_reserved: memory at 50000000 {
> +                       compatible = "shared-dma-pool";
> +                       reg = <0 0x50000000 0 0x800000>;
> +                       no-map;
> +               };
> +
>                 apu_mem: memory at 55000000 {
>                         compatible = "shared-dma-pool";
>                         reg = <0 0x55000000 0 0x1400000>;
> @@ -1146,6 +1152,16 @@ &postmask0_out {
>         remote-endpoint = <&dither0_in>;
>  };
>
> +&scp_cluster {
> +       status = "okay";
> +};
> +
> +&scp_c0 {
> +       firmware-name = "mediatek/mt8188/scp.img";
> +       memory-region = <&scp_mem_reserved>;

It looks like a pinctrl for SCP_VREQ_VAO (GPIO 98) is missing?
Datasheet says it's for "SCP to PMIC normal voltage request", and
MT8195 and MT8192 also have that configured.

Regards,
Fei

> +       status = "okay";
> +};
> +
>  &sound {
>         pinctrl-names = "aud_etdm_hp_on", "aud_etdm_hp_off",
>                         "aud_etdm_spk_on", "aud_etdm_spk_off",
> --
> 2.51.0.rc0.215.g125493bb4a-goog
>
>