[PATCH v6 1/3] dt-bindings: pinctrl: mediatek: Add support for mt8196

[AngeloGioacchino Del Regno]

Il 01/04/25 07:48, Cathy Xu ha scritto:
> Add the new binding document for pinctrl on MediaTek mt8196.
> 
> Signed-off-by: Guodong Liu <guodong.liu at mediatek.com>
> Signed-off-by: Cathy Xu <ot_cathy.xu at mediatek.com>
> ---
>   .../pinctrl/mediatek,mt8196-pinctrl.yaml      | 220 ++++++++++++++++++
>   1 file changed, 220 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,mt8196-pinctrl.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8196-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8196-pinctrl.yaml
> new file mode 100644
> index 000000000000..cef7e0321722
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8196-pinctrl.yaml
> @@ -0,0 +1,220 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8196-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek MT8196 Pin Controller
> +
> +maintainers:
> +  - Lei Xue <lei.xue at mediatek.com>
> +  - Cathy Xu <ot_cathy.xu at mediatek.com>
> +
> +description:
> +  The MediaTek's MT8196 Pin controller is used to control SoC pins.
> +
> +properties:
> +  compatible:
> +    const: mediatek,mt8196-pinctrl
> +
> +  reg:
> +    items:
> +      - description: gpio base
> +      - description: rt group IO
> +      - description: rm1 group IO
> +      - description: rm2 group IO
> +      - description: rb group IO
> +      - description: bm1 group IO
> +      - description: bm2 group IO
> +      - description: bm3 group IO
> +      - description: lt group IO
> +      - description: lm1 group IO
> +      - description: lm2 group IO
> +      - description: lb1 group IO
> +      - description: lb2 group IO
> +      - description: tm1 group IO
> +      - description: tm2 group IO
> +      - description: tm3 group IO
> +
> +  reg-names:
> +    items:
> +      - const: base
> +      - const: rt
> +      - const: rm1
> +      - const: rm2
> +      - const: rb
> +      - const: bm1
> +      - const: bm2
> +      - const: bm3
> +      - const: lt
> +      - const: lm1
> +      - const: lm2
> +      - const: lb1
> +      - const: lb2
> +      - const: tm1
> +      - const: tm2
> +      - const: tm3

Why is there no EINT iospace?

Regards,
Angelo