[PATCH 01/19] arm64: dts: allwinner: h5/h6: Drop spurious 'clock-latency-ns' properties

[Andre Przywara]

On Thu, 03 Apr 2025 21:59:22 -0500
"Rob Herring (Arm)" <robh at kernel.org> wrote:

Hi,

> 'clock-latency-ns' is not a valid property for CPU nodes. It belongs in
> OPP table (which has it). Drop them from the CPU nodes.

Looks alright, only affects H5 and H6, and they indeed have it in their
-cpu-opp.dtsi:

> Signed-off-by: Rob Herring (Arm) <robh at kernel.org>

Reviewed-by: Andre Przywara <andre.przywara at arm.com>

Cheers,
Andre

> ---
>  arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 4 ----
>  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4 ----
>  2 files changed, 8 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> index d3caf27b6a55..48802bf02f3b 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> @@ -16,7 +16,6 @@ cpu0: cpu at 0 {
>  			reg = <0>;
>  			enable-method = "psci";
>  			clocks = <&ccu CLK_CPUX>;
> -			clock-latency-ns = <244144>; /* 8 32k periods */
>  			#cooling-cells = <2>;
>  		};
>  
> @@ -26,7 +25,6 @@ cpu1: cpu at 1 {
>  			reg = <1>;
>  			enable-method = "psci";
>  			clocks = <&ccu CLK_CPUX>;
> -			clock-latency-ns = <244144>; /* 8 32k periods */
>  			#cooling-cells = <2>;
>  		};
>  
> @@ -36,7 +34,6 @@ cpu2: cpu at 2 {
>  			reg = <2>;
>  			enable-method = "psci";
>  			clocks = <&ccu CLK_CPUX>;
> -			clock-latency-ns = <244144>; /* 8 32k periods */
>  			#cooling-cells = <2>;
>  		};
>  
> @@ -46,7 +43,6 @@ cpu3: cpu at 3 {
>  			reg = <3>;
>  			enable-method = "psci";
>  			clocks = <&ccu CLK_CPUX>;
> -			clock-latency-ns = <244144>; /* 8 32k periods */
>  			#cooling-cells = <2>;
>  		};
>  	};
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 2301c59b41b1..73e8604315c5 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -27,7 +27,6 @@ cpu0: cpu at 0 {
>  			reg = <0>;
>  			enable-method = "psci";
>  			clocks = <&ccu CLK_CPUX>;
> -			clock-latency-ns = <244144>; /* 8 32k periods */
>  			#cooling-cells = <2>;
>  			i-cache-size = <0x8000>;
>  			i-cache-line-size = <64>;
> @@ -44,7 +43,6 @@ cpu1: cpu at 1 {
>  			reg = <1>;
>  			enable-method = "psci";
>  			clocks = <&ccu CLK_CPUX>;
> -			clock-latency-ns = <244144>; /* 8 32k periods */
>  			#cooling-cells = <2>;
>  			i-cache-size = <0x8000>;
>  			i-cache-line-size = <64>;
> @@ -61,7 +59,6 @@ cpu2: cpu at 2 {
>  			reg = <2>;
>  			enable-method = "psci";
>  			clocks = <&ccu CLK_CPUX>;
> -			clock-latency-ns = <244144>; /* 8 32k periods */
>  			#cooling-cells = <2>;
>  			i-cache-size = <0x8000>;
>  			i-cache-line-size = <64>;
> @@ -78,7 +75,6 @@ cpu3: cpu at 3 {
>  			reg = <3>;
>  			enable-method = "psci";
>  			clocks = <&ccu CLK_CPUX>;
> -			clock-latency-ns = <244144>; /* 8 32k periods */
>  			#cooling-cells = <2>;
>  			i-cache-size = <0x8000>;
>  			i-cache-line-size = <64>;
>