[PATCH 1/2] arm64: dts: mediatek: mt8188: Add ethernet node

AngeloGioacchino Del Regno angelogioacchino.delregno at collabora.com
Wed Oct 16 03:39:59 PDT 2024


Il 15/10/24 20:15, Nícolas F. R. A. Prado ha scritto:
> Describe the ethernet present on the MT8188.
> 
> Signed-off-by: Jianguo Zhang <jianguo.zhang at mediatek.com>
> Signed-off-by: Macpaul Lin <macpaul.lin at mediatek.com>
> Signed-off-by: Hsuan-Yu Lin <shane.lin at canonical.com>
> [Cleaned up to pass dtbs_check, follow DTS style guidelines, removed
> hardcoded mac address and split between mt8188 and genio700 commits]
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado at collabora.com>
> ---
>   arch/arm64/boot/dts/mediatek/mt8188.dtsi | 95 ++++++++++++++++++++++++++++++++
>   1 file changed, 95 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> index b493207a1b688dba51bf5e0e469349263f54ca94..9e3981d6d5cfc8201d8caef256de1299aa8199e3 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> @@ -1647,6 +1647,101 @@ spi5: spi at 11019000 {
>   			status = "disabled";
>   		};
>   
> +		eth: ethernet at 11021000 {
> +			compatible = "mediatek,mt8188-gmac", "mediatek,mt8195-gmac",
> +				     "snps,dwmac-5.10a";
> +			reg = <0 0x11021000 0 0x4000>;
> +			interrupts = <GIC_SPI 716 IRQ_TYPE_LEVEL_HIGH 0>;
> +			interrupt-names = "macirq";
> +			clocks = <&pericfg_ao CLK_PERI_AO_ETHERNET>,
> +				 <&pericfg_ao CLK_PERI_AO_ETHERNET_BUS>,
> +				 <&topckgen CLK_TOP_SNPS_ETH_250M>,
> +				 <&topckgen CLK_TOP_SNPS_ETH_62P4M_PTP>,
> +				 <&topckgen CLK_TOP_SNPS_ETH_50M_RMII>,
> +				 <&pericfg_ao CLK_PERI_AO_ETHERNET_MAC>;

			clock-names = "axi", "apb", "mac_main", "ptp_ref",
				      "rmii_internal", "mac_cg";

Since we can compress clock-names, we should just do that :-)

> +			clock-names = "axi",
> +				      "apb",
> +				      "mac_main",
> +				      "ptp_ref",
> +				      "rmii_internal",
> +				      "mac_cg";
> +			assigned-clocks = <&topckgen CLK_TOP_SNPS_ETH_250M>,
> +					  <&topckgen CLK_TOP_SNPS_ETH_62P4M_PTP>,
> +					  <&topckgen CLK_TOP_SNPS_ETH_50M_RMII>;
> +			assigned-clock-parents = <&topckgen CLK_TOP_ETHPLL_D2>,
> +						 <&topckgen CLK_TOP_ETHPLL_D8>,
> +						 <&topckgen CLK_TOP_ETHPLL_D10>;
> +			power-domains = <&spm MT8188_POWER_DOMAIN_ETHER>;
> +			mediatek,pericfg = <&infracfg_ao>;
> +			snps,axi-config = <&stmmac_axi_setup>;
> +			snps,mtl-rx-config = <&mtl_rx_setup>;
> +			snps,mtl-tx-config = <&mtl_tx_setup>;
> +			snps,txpbl = <16>;
> +			snps,rxpbl = <16>;
> +			snps,clk-csr = <0>;
> +			status = "disabled";

Well, the MDIO bus is part of the IP anyway, so I think we can just put it here.

			eth_mdio: mdio {
				compatible = "snps,dwmac-mdio";
				#address-cells = <1>;
				#size-cells = <0>;
			};


> +
> +			stmmac_axi_setup: stmmac-axi-config {

Please reorder:
				snps,blen = <0 0 0 0 16 8 4>;
				snps,rd_osr_lmt = <0x7>;
				snps,wr_osr_lmt = <0x7>;

Cheers,
Angelo




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