[PATCH 2/9] arm64: dts: mediatek: mt8188: Add PCIe nodes
Fei Shao
fshao at chromium.org
Wed Oct 2 23:17:57 PDT 2024
On Wed, Oct 2, 2024 at 8:42 PM Macpaul Lin <macpaul.lin at mediatek.com> wrote:
>
>
>
> On 10/2/24 19:41, Fei Shao wrote:
> >
> >
> > External email : Please do not click links or open attachments until you
> > have verified the sender or the content.
> >
> >
> > Add PCIe node and the associated PHY node.
> > Individual board device tree should enable the nodes as needed.
> >
> > Signed-off-by: Fei Shao <fshao at chromium.org>
> > ---
> >
> > arch/arm64/boot/dts/mediatek/mt8188.dtsi | 62 ++++++++++++++++++++++++
> > 1 file changed, 62 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> > index 10195a4e4e9d..9431f3c5c228 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> > @@ -1763,6 +1763,53 @@ xhci0: usb at 112b0000 {
> > status = "disabled";
> > };
> >
> > + pcie: pcie at 112f0000 {
> > + compatible = "mediatek,mt8188-pcie", "mediatek,mt8192-pcie";
> > + reg = <0 0x112f0000 0 0x2000>;
> > + reg-names = "pcie-mac";
>
> It seems the property 'linux,pci-domain = <0>;' is missing?
I'll add that. I guess the fallback will assign a dynamic ID to it
(likely also 0), but explicitly having a static domain ID is never a
bad thing.
>
> [snip]
>
> > + };
> > + };
> > +
> > nor_flash: spi at 1132c000 {
> > compatible = "mediatek,mt8188-nor", "mediatek,mt8186-nor";
> > reg = <0 0x1132c000 0 0x1000>;
> > @@ -1775,6 +1822,21 @@ nor_flash: spi at 1132c000 {
> > status = "disabled";
> > };
> >
> > + pciephy: t-phy at 11c20700 {
> > + compatible = "mediatek,mt8188-tphy", "mediatek,generic-tphy-v3";
> > + ranges = <0 0 0x11c20700 0x700>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + status = "disabled";
> > +
>
> The power-domains property is missing.
> It should be 'power-domains = <&spm MT8188_POWER_DOMAIN_PEXTP_PHY_TOP>;'
I dropped this as the binding check was against it, and I thought it
was a mistake because other tphy nodes don't seem to have a power
domain either.
And now I noticed your tphy binding patch in [1] so that explains,
except that I still can't tell whether there should be a power domain
for a given tphy node...
Anyway, I'll fix this one. Thanks!
[1]: https://lore.kernel.org/all/20240926101804.22471-1-macpaul.lin@mediatek.com/
Regards,
Fei
>
> > + pcieport: pcie-phy at 0 {
> > + reg = <0 0x700>;
> > + clocks = <&topckgen CLK_TOP_CFGREG_F_PCIE_PHY_REF>;
> > + clock-names = "ref";
> > + #phy-cells = <1>;
> > + };
> > + };
> > +
> > i2c1: i2c at 11e00000 {
> > compatible = "mediatek,mt8188-i2c";
> > reg = <0 0x11e00000 0 0x1000>,
>
> Thanks!
> Best regards,
> Macpaul Lin
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