[PATCH v2 12/13] thermal/drivers/mediatek/lvts_thermal: add MT8188 support
AngeloGioacchino Del Regno
angelogioacchino.delregno at collabora.com
Tue Mar 19 04:51:44 PDT 2024
Il 18/03/24 22:22, Nicolas Pitre ha scritto:
> From: Nicolas Pitre <npitre at baylibre.com>
>
> Various values extracted from the vendor's kernel driver.
>
> Signed-off-by: Nicolas Pitre <npitre at baylibre.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8188.dtsi | 35 ++++++++
> drivers/thermal/mediatek/lvts_thermal.c | 102 +++++++++++++++++++++++
> 2 files changed, 137 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> index b4315c9214..5a3c58a77c 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> @@ -11,6 +11,7 @@
> #include <dt-bindings/phy/phy.h>
> #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
> #include <dt-bindings/power/mediatek,mt8188-power.h>
> +#include <dt-bindings/reset/mt8188-resets.h>
>
> / {
> compatible = "mediatek,mt8188";
> @@ -357,6 +358,7 @@ infracfg_ao: syscon at 10001000 {
> compatible = "mediatek,mt8188-infracfg-ao", "syscon";
> reg = <0 0x10001000 0 0x1000>;
> #clock-cells = <1>;
> + #reset-cells = <1>;
> };
>
> pericfg: syscon at 10003000 {
> @@ -491,6 +493,17 @@ spi0: spi at 1100a000 {
> status = "disabled";
> };
>
> + lvts_ap: thermal-sensor at 1100b000 {
> + compatible = "mediatek,mt8188-lvts-ap";
> + reg = <0 0x1100b000 0 0x1000>;
iospace clashing with SVS. NAK.
> + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
> + resets = <&infracfg_ao MT8188_INFRA_RST1_THERMAL_CTRL_RST>;
> + nvmem-cells = <&lvts_efuse_data1>;
> + nvmem-cell-names = "lvts_calib_data1";
> + #thermal-sensor-cells = <1>;
> + };
> +
> spi1: spi at 11010000 {
> compatible = "mediatek,mt8188-spi-ipm", "mediatek,spi-ipm";
> #address-cells = <1>;
> @@ -604,6 +617,17 @@ mmc1: mmc at 11240000 {
> status = "disabled";
> };
>
> + lvts_mcu: thermal-sensor at 11278000 {
> + compatible = "mediatek,mt8188-lvts-mcu";
> + reg = <0 0x11278000 0 0x1000>;
> + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
> + resets = <&infracfg_ao MT8188_INFRA_RST1_THERMAL_MCU_RST>;
> + nvmem-cells = <&lvts_efuse_data1>;
> + nvmem-cell-names = "lvts_calib_data1";
> + #thermal-sensor-cells = <1>;
> + };
> +
> i2c0: i2c at 11280000 {
> compatible = "mediatek,mt8188-i2c";
> reg = <0 0x11280000 0 0x1000>,
> @@ -827,6 +851,17 @@ imp_iic_wrap_en: clock-controller at 11ec2000 {
> #clock-cells = <1>;
> };
>
> + efuse: efuse at 11f20000 {
> + compatible = "mediatek,mt8188-efuse", "mediatek,efuse";
> + reg = <0 0x11f20000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + lvts_efuse_data1: lvts1-calib at 1ac {
> + reg = <0x1ac 0x40>;
> + };
> + };
> +
> mfgcfg: clock-controller at 13fbf000 {
> compatible = "mediatek,mt8188-mfgcfg";
> reg = <0 0x13fbf000 0 0x1000>;
> diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
> index a23a93fc82..46882df640 100644
> --- a/drivers/thermal/mediatek/lvts_thermal.c
> +++ b/drivers/thermal/mediatek/lvts_thermal.c
> @@ -1448,6 +1448,90 @@ static const struct lvts_ctrl_data mt8186_lvts_data_ctrl[] = {
> }
> };
>
> +static const struct lvts_ctrl_data mt8188_lvts_mcu_data_ctrl[] = {
> + {
> + .lvts_sensor = {
> + { .dt_id = MT8188_MCU_TS1_0,
> + .cal_offsets = { 22, 23, 24 } },
> + { .dt_id = MT8188_MCU_TS1_1,
> + .cal_offsets = { 25, 26, 27 } },
> + { .dt_id = MT8188_MCU_TS1_2,
> + .cal_offsets = { 28, 29, 30 } },
> + { .dt_id = MT8188_MCU_TS1_3,
> + .cal_offsets = { 31, 32, 33 } },
> + },
> + VALID_SENSOR_MAP(1, 1, 1, 1),
> + .offset = 0x0,
> + .hw_tshut_temp = 117000,
> + .mode = LVTS_MSR_FILTERED_MODE,
> + },
> + {
> + .lvts_sensor = {
> + { .dt_id = MT8188_MCU_TS2_0,
> + .cal_offsets = { 34, 35, 36 } },
> + { .dt_id = MT8188_MCU_TS2_1,
> + .cal_offsets = { 37, 38, 39 } },
> + },
> + VALID_SENSOR_MAP(1, 1, 0, 0),
> + .offset = 0x100,
> + .hw_tshut_temp = 117000,
> + .mode = LVTS_MSR_FILTERED_MODE,
> + }
> +};
> +
> +static const struct lvts_ctrl_data mt8188_lvts_ap_data_ctrl[] = {
> + {
> + .lvts_sensor = {
> +
> + { /* unused */ },
> + { .dt_id = MT8188_AP_TS3_1,
> + .cal_offsets = { 40, 41, 42 } },
> + },
> + VALID_SENSOR_MAP(0, 1, 0, 0),
> + .offset = 0x0,
> + .hw_tshut_temp = 117000,
> + .mode = LVTS_MSR_FILTERED_MODE,
> + },
> + {
> + .lvts_sensor = {
> + { .dt_id = MT8188_AP_TS4_0,
> + .cal_offsets = { 43, 44, 45 } },
> + { .dt_id = MT8188_AP_TS4_1,
> + .cal_offsets = { 46, 47, 48 } },
> + { .dt_id = MT8188_AP_TS4_2,
> + .cal_offsets = { 49, 50, 51 } },
> + },
> + VALID_SENSOR_MAP(1, 1, 1, 0),
> + .offset = 0x100,
> + .hw_tshut_temp = 117000,
> + .mode = LVTS_MSR_FILTERED_MODE,
> + },
> + {
> + .lvts_sensor = {
> + { .dt_id = MT8188_AP_TS5_0,
> + .cal_offsets = { 52, 53, 54 } },
> + { .dt_id = MT8188_AP_TS5_1,
> + .cal_offsets = { 55, 56, 57 } },
> + },
> + VALID_SENSOR_MAP(1, 1, 0, 0),
> + .offset = 0x200,
> + .hw_tshut_temp = 117000,
> + .mode = LVTS_MSR_FILTERED_MODE,
> + },
> + {
> + .lvts_sensor = {
> + { .dt_id = MT8188_AP_TS6_0,
> + .cal_offsets = { 58, 59, 60 } },
> + { .dt_id = MT8188_AP_TS6_1,
> + .cal_offsets = { 61, 62, 63 } },
> + },
> + VALID_SENSOR_MAP(1, 1, 0, 0),
> + .offset = 0x300,
> + .hw_tshut_temp = 117000,
> + .mode = LVTS_MSR_FILTERED_MODE,
> + }
> +};
> +
> static const struct lvts_ctrl_data mt8192_lvts_mcu_data_ctrl[] = {
> {
> .lvts_sensor = {
> @@ -1645,6 +1729,22 @@ static const struct lvts_data mt8186_lvts_data = {
> .gt_calib_bit_offset = 24,
> };
>
> +static const struct lvts_data mt8188_lvts_mcu_data = {
> + .lvts_ctrl = mt8188_lvts_mcu_data_ctrl,
> + .num_lvts_ctrl = ARRAY_SIZE(mt8188_lvts_mcu_data_ctrl),
> + .temp_factor = -250460,
> + .temp_offset = 250460,
This is LVTS_COEFF_{A,B}_MT8195: please use the definitions that are already there.
Regards,
Angelo
> + .gt_calib_bit_offset = 20,
> +};
> +
> +static const struct lvts_data mt8188_lvts_ap_data = {
> + .lvts_ctrl = mt8188_lvts_ap_data_ctrl,
> + .num_lvts_ctrl = ARRAY_SIZE(mt8188_lvts_ap_data_ctrl),
> + .temp_factor = -250460,
> + .temp_offset = 250460,
> + .gt_calib_bit_offset = 20,
> +};
> +
> static const struct lvts_data mt8192_lvts_mcu_data = {
> .lvts_ctrl = mt8192_lvts_mcu_data_ctrl,
> .num_lvts_ctrl = ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl),
> @@ -1676,6 +1776,8 @@ static const struct lvts_data mt8195_lvts_ap_data = {
> static const struct of_device_id lvts_of_match[] = {
> { .compatible = "mediatek,mt7988-lvts-ap", .data = &mt7988_lvts_ap_data },
> { .compatible = "mediatek,mt8186-lvts", .data = &mt8186_lvts_data },
> + { .compatible = "mediatek,mt8188-lvts-mcu", .data = &mt8188_lvts_mcu_data },
> + { .compatible = "mediatek,mt8188-lvts-ap", .data = &mt8188_lvts_ap_data },
> { .compatible = "mediatek,mt8192-lvts-mcu", .data = &mt8192_lvts_mcu_data },
> { .compatible = "mediatek,mt8192-lvts-ap", .data = &mt8192_lvts_ap_data },
> { .compatible = "mediatek,mt8195-lvts-mcu", .data = &mt8195_lvts_mcu_data },
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