[PATCH 07/14] mips: dts: ralink: mt7621: reorder spi0 node attributes

[Justin Swartz]

Reorder the attributes of the SPI controller node so that
they're aligned with the DTS style guide.

Signed-off-by: Justin Swartz <justin.swartz at risingedge.co.za>
---
 arch/mips/boot/dts/ralink/mt7621.dtsi | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 87a3bcbc0..60dfbae53 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -183,22 +183,22 @@ serial2: serial at e00 {
 		};
 
 		spi0: spi at b00 {
-			status = "disabled";
-
 			compatible = "ralink,mt7621-spi";
 			reg = <0xb00 0x100>;
 
-			clocks = <&sysc MT7621_CLK_SPI>;
-			clock-names = "spi";
-
-			resets = <&sysc MT7621_RST_SPI>;
-			reset-names = "spi";
-
 			#address-cells = <1>;
 			#size-cells = <0>;
 
+			clock-names = "spi";
+			clocks = <&sysc MT7621_CLK_SPI>;
+
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
+
+			reset-names = "spi";
+			resets = <&sysc MT7621_RST_SPI>;
+
+			status = "disabled";
 		};
 	};
 
--