[PATCH 02/14] mips: dts: ralink: mt7621: reorder cpuintc node attributes

[Justin Swartz]

Reorder the CPU Interrupt Controller node's attributes to follow
what the DTS Coding Style dictates.

Signed-off-by: Justin Swartz <justin.swartz at risingedge.co.za>
---
 arch/mips/boot/dts/ralink/mt7621.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 73dad64e1..ec87e46ba 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -27,10 +27,12 @@ cpu at 1 {
 	};
 
 	cpuintc: cpuintc {
+		compatible = "mti,cpu-interrupt-controller";
+
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
+
 		interrupt-controller;
-		compatible = "mti,cpu-interrupt-controller";
 	};
 
 	mmc_fixed_3v3: regulator-3v3 {
--