[PATCH v1 7/7] ufs: host: mediatek: support rtff in PM flow

[Chun-Hung Wu (巫駿宏)]

On Fri, 2024-03-08 at 15:02 +0800, peter.wang at mediatek.com wrote:
> From: Peter Wang <peter.wang at mediatek.com>
> 
> From: Alice Chao <alice.chao at mediatek.com>
> 
> Reviewed-by: Peter Wang <peter.wang at mediatek.com>
> Signed-off-by: Peter Wang <peter.wang at mediatek.com>
> Signed-off-by: Alice Chao <alice.chao at mediatek.com>
> ---
>  drivers/ufs/host/ufs-mediatek-sip.h |  4 ++++
>  drivers/ufs/host/ufs-mediatek.c     | 35
> +++++++++++++++++++++++++++++
>  drivers/ufs/host/ufs-mediatek.h     |  2 ++
>  3 files changed, 41 insertions(+)
> 
> diff --git a/drivers/ufs/host/ufs-mediatek-sip.h
> b/drivers/ufs/host/ufs-mediatek-sip.h
> index 64f48ecc54c7..eeab0f93146e 100755
> --- a/drivers/ufs/host/ufs-mediatek-sip.h
> +++ b/drivers/ufs/host/ufs-mediatek-sip.h
> @@ -20,6 +20,7 @@
>  #define UFS_MTK_SIP_GET_VCC_NUM           BIT(6)
>  #define UFS_MTK_SIP_DEVICE_PWR_CTRL       BIT(7)
>  #define UFS_MTK_SIP_MPHY_CTRL             BIT(8)
> +#define UFS_MTK_SIP_MTCMOS_CTRL           BIT(9)
>  
>  /*
>   * Multi-VCC by Numbering
> @@ -87,4 +88,7 @@ static inline void _ufs_mtk_smc(struct
> ufs_mtk_smc_arg s)
>  #define ufs_mtk_mphy_ctrl(op, res) \
>  	ufs_mtk_smc(UFS_MTK_SIP_MPHY_CTRL, &(res), op)
>  
> +#define ufs_mtk_mtcmos_ctrl(op, res) \
> +	ufs_mtk_smc(UFS_MTK_SIP_MTCMOS_CTRL, &(res), op)
> +
>  #endif /* !_UFS_MEDIATEK_SIP_H */
> diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-
> mediatek.c
> index c4aae031b694..2f191525c308 100644
> --- a/drivers/ufs/host/ufs-mediatek.c
> +++ b/drivers/ufs/host/ufs-mediatek.c
> @@ -127,6 +127,13 @@ static bool ufs_mtk_is_tx_skew_fix(struct
> ufs_hba *hba)
>  	return !!(host->caps & UFS_MTK_CAP_TX_SKEW_FIX);
>  }
>  
> +static bool ufs_mtk_is_rtff_mtcmos(struct ufs_hba *hba)
> +{
> +	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
> +
> +	return !!(host->caps & UFS_MTK_CAP_RTFF_MTCMOS);
> +}
> +
>  static bool ufs_mtk_is_allow_vccqx_lpm(struct ufs_hba *hba)
>  {
>  	struct ufs_mtk_host *host = ufshcd_get_variant(hba);
> @@ -653,6 +660,9 @@ static void ufs_mtk_init_host_caps(struct ufs_hba
> *hba)
>  	if (of_property_read_bool(np, "mediatek,ufs-disable-mcq"))
>  		host->caps |= UFS_MTK_CAP_DISABLE_MCQ;
>  
> +	if (of_property_read_bool(np, "mediatek,ufs-rtff-mtcmos"))
> +		host->caps |= UFS_MTK_CAP_RTFF_MTCMOS;
> +
>  	dev_info(hba->dev, "caps: 0x%x", host->caps);
>  }
>  
> @@ -993,6 +1003,15 @@ static int ufs_mtk_init(struct ufs_hba *hba)
>  	 * Enable phy clocks specifically here.
>  	 */
>  	ufs_mtk_mphy_power_on(hba, true);
> +
> +	if (ufs_mtk_is_rtff_mtcmos(hba)) {
> +		/* First Restore here, to avoid backup unexpected value
> */
> +		ufs_mtk_mtcmos_ctrl(false, res);
> +
> +		/* Power on to init */
> +		ufs_mtk_mtcmos_ctrl(true, res);
> +	}
> +
>  	ufs_mtk_setup_clocks(hba, true, POST_CHANGE);
>  
>  	host->ip_ver = ufshcd_readl(hba, REG_UFS_MTK_IP_VER);
> @@ -1823,6 +1842,7 @@ static void ufs_mtk_remove(struct
> platform_device *pdev)
>  static int ufs_mtk_system_suspend(struct device *dev)
>  {
>  	struct ufs_hba *hba = dev_get_drvdata(dev);
> +	struct arm_smccc_res res;
>  	int ret;
>  
>  	ret = ufshcd_system_suspend(dev);
> @@ -1831,15 +1851,22 @@ static int ufs_mtk_system_suspend(struct
> device *dev)
>  
>  	ufs_mtk_dev_vreg_set_lpm(hba, true);
>  
> +	if (ufs_mtk_is_rtff_mtcmos(hba))
> +		ufs_mtk_mtcmos_ctrl(false, res);
> +
>  	return 0;
>  }
>  
>  static int ufs_mtk_system_resume(struct device *dev)
>  {
>  	struct ufs_hba *hba = dev_get_drvdata(dev);
> +	struct arm_smccc_res res;
>  
>  	ufs_mtk_dev_vreg_set_lpm(hba, false);
>  
> +	if (ufs_mtk_is_rtff_mtcmos(hba))
> +		ufs_mtk_mtcmos_ctrl(true, res);
> +
>  	return ufshcd_system_resume(dev);
>  }
>  #endif
> @@ -1848,6 +1875,7 @@ static int ufs_mtk_system_resume(struct device
> *dev)
>  static int ufs_mtk_runtime_suspend(struct device *dev)
>  {
>  	struct ufs_hba *hba = dev_get_drvdata(dev);
> +	struct arm_smccc_res res;
>  	int ret = 0;
>  
>  	ret = ufshcd_runtime_suspend(dev);
> @@ -1856,12 +1884,19 @@ static int ufs_mtk_runtime_suspend(struct
> device *dev)
>  
>  	ufs_mtk_dev_vreg_set_lpm(hba, true);
>  
> +	if (ufs_mtk_is_rtff_mtcmos(hba))
> +		ufs_mtk_mtcmos_ctrl(false, res);
> +
>  	return 0;
>  }
>  
>  static int ufs_mtk_runtime_resume(struct device *dev)
>  {
>  	struct ufs_hba *hba = dev_get_drvdata(dev);
> +	struct arm_smccc_res res;
> +
> +	if (ufs_mtk_is_rtff_mtcmos(hba))
> +		ufs_mtk_mtcmos_ctrl(true, res);
>  
>  	ufs_mtk_dev_vreg_set_lpm(hba, false);
>  
> diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-
> mediatek.h
> index 6129ab59e5f5..599fea66663b 100644
> --- a/drivers/ufs/host/ufs-mediatek.h
> +++ b/drivers/ufs/host/ufs-mediatek.h
> @@ -131,6 +131,8 @@ enum ufs_mtk_host_caps {
>  	UFS_MTK_CAP_PMC_VIA_FASTAUTO           = 1 << 6,
>  	UFS_MTK_CAP_TX_SKEW_FIX                = 1 << 7,
>  	UFS_MTK_CAP_DISABLE_MCQ                = 1 << 8,
> +	/* Control MTCMOS with RTFF */
> +	UFS_MTK_CAP_RTFF_MTCMOS                = 1 << 9,
>  };
>  
>  struct ufs_mtk_crypt_cfg {

Acked-by: Chun-Hung Wu <Chun-Hung.Wu at mediatek.com>