[PATCH 2/4] arm64: dts: mediatek: mt8195: Add missing gce-client-reg to vpp/vdosys
AngeloGioacchino Del Regno
angelogioacchino.delregno at collabora.com
Fri Mar 1 00:50:31 PST 2024
Il 29/02/24 20:44, Nícolas F. R. A. Prado ha scritto:
> Add the missing mediatek,gce-client-reg property to the vppsys and
> vdosys nodes to allow them to use the GCE. This prevents the "can't
> parse gce-client-reg property" error from being printed and should
> result in better performance.
>
> Fixes: 6aa5b46d1755 ("arm64: dts: mt8195: Add vdosys and vppsys clock nodes")
> Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado at collabora.com>
Can you please squash patches 2,3,4 in a single one?
It doesn't make a lot of sense to have them separated in this case, only
generates commit noise for no practical reason imo.
arm64: dts: mediatek: mt8195: Add missing gce-client-reg to vpp/vdo/mutex
Thanks,
Angelo
> ---
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index ea6dc220e1cc..f2912e1a0e49 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -2028,6 +2028,7 @@ vppsys0: syscon at 14000000 {
> compatible = "mediatek,mt8195-vppsys0", "syscon";
> reg = <0 0x14000000 0 0x1000>;
> #clock-cells = <1>;
> + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0 0x1000>;
> };
>
> dma-controller at 14001000 {
> @@ -2251,6 +2252,7 @@ vppsys1: syscon at 14f00000 {
> compatible = "mediatek,mt8195-vppsys1", "syscon";
> reg = <0 0x14f00000 0 0x1000>;
> #clock-cells = <1>;
> + mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0 0x1000>;
> };
>
> mutex at 14f01000 {
> @@ -3080,6 +3082,7 @@ vdosys0: syscon at 1c01a000 {
> reg = <0 0x1c01a000 0 0x1000>;
> mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
> #clock-cells = <1>;
> + mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xa000 0x1000>;
> };
>
>
>
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