[PATCH v6 5/5] arm64: dts: mediatek: mt8365: Add support for camera

AngeloGioacchino Del Regno angelogioacchino.delregno at collabora.com
Mon Jul 29 08:08:48 PDT 2024


Il 29/07/24 16:48, Julien Stephan ha scritto:
> Add base support for cameras for mt8365 platforms. This requires nodes
> for the sensor interface, camsv, and CSI receivers.
> 
> Reviewed-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
> Signed-off-by: Julien Stephan <jstephan at baylibre.com>
> ---
>   arch/arm64/boot/dts/mediatek/mt8365.dtsi | 125 +++++++++++++++++++++++++++++++
>   1 file changed, 125 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> index 24581f7410aa..cabdb51f4041 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> @@ -10,6 +10,7 @@
>   #include <dt-bindings/interrupt-controller/irq.h>
>   #include <dt-bindings/phy/phy.h>
>   #include <dt-bindings/power/mediatek,mt8365-power.h>
> +#include <dt-bindings/memory/mediatek,mt8365-larb-port.h>
>   
>   / {
>   	compatible = "mediatek,mt8365";
> @@ -703,6 +704,23 @@ ethernet: ethernet at 112a0000 {
>   			status = "disabled";
>   		};
>   
> +		mipi_csi0: mipi-csi0 at 11c10000 {

Names must be generic. This is mipi-csi-phy at xyz or csi-phy at xyz as it looks
like it's not the entire CSI interface but just its PHY. Am I wrong?

> +			compatible = "mediatek,mt8365-csi-rx";
> +			reg = <0 0x11c10000 0 0x2000>;
> +			status = "disabled";
> +			num-lanes = <4>;
> +			#phy-cells = <1>;
> +		};
> +
> +		mipi_csi1: mipi-csi1 at 11c12000 {

Same for this one.

> +			compatible = "mediatek,mt8365-csi-rx";
> +			reg = <0 0x11c12000 0 0x2000>;
> +			phy-type = <PHY_TYPE_DPHY>;

...so the secondary CSIPHY only supports DPHY, while the first one supports either
C or D?

> +			status = "disabled";
> +			num-lanes = <4>;
> +			#phy-cells = <0>;

...and then, it's confusing, one CSI has got one PHY cell, one has got two?

> +		};
> +
>   		u3phy: t-phy at 11cc0000 {
>   			compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2";
>   			#address-cells = <1>;
> @@ -773,6 +791,113 @@ larb2: larb at 15001000 {
>   			mediatek,larb-id = <2>;
>   		};
>   
> +		seninf: seninf at 15040000 {
> +			compatible = "mediatek,mt8365-seninf";
> +			reg = <0 0x15040000 0 0x6000>;
> +			interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_LOW>;
> +			clocks = <&camsys CLK_CAM_SENIF>,
> +				 <&topckgen CLK_TOP_SENIF_SEL>;
> +			clock-names = "camsys", "top_mux";
> +
> +			power-domains = <&spm MT8365_POWER_DOMAIN_CAM>;
> +
> +			phys = <&mipi_csi0 PHY_TYPE_DPHY>, <&mipi_csi1>;
> +			phy-names = "csi0", "csi1";
> +
> +			status = "disabled";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port at 0 {
> +					reg = <0>;
> +				};
> +
> +				port at 1 {
> +					reg = <1>;
> +				};
> +
> +				port at 2 {
> +					reg = <2>;
> +				};
> +
> +				port at 3 {
> +					reg = <3>;
> +				};
> +

Empty ports, why?

Regards,
Angelo





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