[bug report] net: airoha: Introduce ethernet support for EN7581 SoC

Dan Carpenter dan.carpenter at linaro.org
Fri Jul 19 15:17:33 PDT 2024


On Fri, Jul 19, 2024 at 10:39:58PM +0200, Lorenzo Bianconi wrote:
> [...]
> > drivers/net/ethernet/mediatek/airoha_eth.c
> >     1134 static void airoha_fe_pse_ports_init(struct airoha_eth *eth)
> >     1135 {
> >     1136         const u32 pse_port_num_queues[] = {
> >     1137                 [FE_PSE_PORT_CDM1] = 6,
> >     1138                 [FE_PSE_PORT_GDM1] = 6,
> >     1139                 [FE_PSE_PORT_GDM2] = 32,
> >     1140                 [FE_PSE_PORT_GDM3] = 6,
> >     1141                 [FE_PSE_PORT_PPE1] = 4,
> >     1142                 [FE_PSE_PORT_CDM2] = 6,
> >     1143                 [FE_PSE_PORT_CDM3] = 8,
> >                          ^^^^^^^^^^^^^^^^^^^^^^^
> > 
> >     1144                 [FE_PSE_PORT_CDM4] = 10,
> >     1145                 [FE_PSE_PORT_PPE2] = 4,
> >     1146                 [FE_PSE_PORT_GDM4] = 2,
> >     1147                 [FE_PSE_PORT_CDM5] = 2,
> >     1148         };
> >     1149         int q;
> >     1150 
> >     1151         /* hw misses PPE2 oq rsv */
> >     1152         airoha_fe_set(eth, REG_FE_PSE_BUF_SET,
> >     1153                       PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2]);
> >     1154 
> >     1155         /* CMD1 */
> >     1156         for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_CDM1]; q++)
> >     1157                 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM1, q,
> >     1158                                          PSE_QUEUE_RSV_PAGES);
> >     1159         /* GMD1 */
> >     1160         for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_GDM1]; q++)
> >     1161                 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_GDM1, q,
> >     1162                                          PSE_QUEUE_RSV_PAGES);
> >     1163         /* GMD2 */
> >     1164         for (q = 6; q < pse_port_num_queues[FE_PSE_PORT_GDM2]; q++)
> >     1165                 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_GDM2, q, 0);
> >     1166         /* GMD3 */
> >     1167         for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_GDM3]; q++)
> >     1168                 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_GDM3, q,
> >     1169                                          PSE_QUEUE_RSV_PAGES);
> >     1170         /* PPE1 */
> >     1171         for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_PPE1]; q++) {
> >     1172                 if (q < pse_port_num_queues[FE_PSE_PORT_PPE1])
> >     1173                         airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE1, q,
> >     1174                                                  PSE_QUEUE_RSV_PAGES);
> >     1175                 else
> >     1176                         airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE1, q, 0);
> >     1177         }
> >     1178         /* CDM2 */
> >     1179         for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_CDM2]; q++)
> >     1180                 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM2, q,
> >     1181                                          PSE_QUEUE_RSV_PAGES);
> >     1182         /* CDM3 */
> > --> 1183         for (q = 0; q < pse_port_num_queues[FE_PSE_PORT_CDM3] - 1; q++)
> >                                                                       ^^^^
> > This - 1 doesn't look intentional.  It's the only time this value is used.
> 
> I checked the vendor sdk and this is fine.
> 

If there are 7 queues, just change [FE_PSE_PORT_CDM3] = 7.  If there are
8 queues but the last one is not used, then add a comment.  /* The - 1 is
because we are reserving the last queue for secret reasons. Shhhh... */
That way people will know it's intentional.

regards,
dan carpenter




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