[PATCH v6, 2/4] drm/mediatek: dp: Add the audio packet flag to mtk_dp_data struct

[CK Hu (胡俊光)]

Hi, Shuijing:

On Tue, 2023-08-22 at 10:41 +0800, Shuijing Li wrote:
> The audio packet arrangement function is to only arrange audio
> packets into the Hblanking area. In order to align with the HW
> default setting of mt8195, this function needs to be turned off.

Reviewed-by: CK Hu <ck.hu at mediatek.com>

> 
> Signed-off-by: Shuijing Li <shuijing.li at mediatek.com>
> ---
> Changes in v6:
> Move mt8188 related code to another patch
> per suggestion from the previous thread:
> 
https://lore.kernel.org/all/33e6ccc4e97b0ef25f6a2360372332180f1ef891.camel@mediatek.com/
> Changes in v5:
> Separate mt8188 related code into mtk_dp_data structure and mt8188
> dp/edp function
> per suggestion from the previous thread:
> 
https://lore.kernel.org/lkml/c1c84616f3da83a8a2bc245b0d3c7697153cd81a.camel@mediatek.com/
> Changes in v4:
> drop mt8188_edp_data and remove unnecessary modification.
> per suggestion from the previous thread:
> 
https://lore.kernel.org/all/bddb1a1a445ead85056202c355627698051f12c9.camel@mediatek.com/
> Changes in v3:
> Separate these two things into two different patches.
> per suggestion from the previous thread:
> 
https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/
> Changes in v2:
> - change the variables' name to be more descriptive
> - add a comment that describes the function of
> mtk_dp_audio_sample_arrange
> - reduce indentation by doing the inverse check
> - add a definition of some bits
> - add support for mediatek, mt8188-edp-tx
> per suggestion from the previous thread:
> 
https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/
> ---
>  drivers/gpu/drm/mediatek/mtk_dp.c     | 14 ++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_dp_reg.h |  5 +++++
>  2 files changed, 19 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c
> b/drivers/gpu/drm/mediatek/mtk_dp.c
> index 64eee77452c0..badb205ffff2 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dp.c
> @@ -139,6 +139,7 @@ struct mtk_dp_data {
>  	unsigned int smc_cmd;
>  	const struct mtk_dp_efuse_fmt *efuse_fmt;
>  	bool audio_supported;
> +	bool audio_pkt_in_hblank_area;
>  };
>  
>  static const struct mtk_dp_efuse_fmt
> mt8195_edp_efuse_fmt[MTK_DP_CAL_MAX] = {
> @@ -1362,6 +1363,18 @@ static void
> mtk_dp_sdp_set_down_cnt_init_in_hblank(struct mtk_dp *mtk_dp)
>  			   SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENC1_P0_MASK)
> ;
>  }
>  
> +static void mtk_dp_audio_sample_arrange_disable(struct mtk_dp
> *mtk_dp)
> +{
> +	/* arrange audio packets into the Hblanking and Vblanking area
> */
> +	if (!mtk_dp->data->audio_pkt_in_hblank_area)
> +		return;
> +
> +	mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3374, 0,
> +			   SDP_ASP_INSERT_IN_HBLANK_DP_ENC1_P0_MASK);
> +	mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3374, 0,
> +			   SDP_DOWN_ASP_CNT_INIT_DP_ENC1_P0_MASK);
> +}
> +
>  static void mtk_dp_setup_tu(struct mtk_dp *mtk_dp)
>  {
>  	u32 sram_read_start = min_t(u32,
> MTK_DP_TBC_BUF_READ_START_ADDR,
> @@ -1371,6 +1384,7 @@ static void mtk_dp_setup_tu(struct mtk_dp
> *mtk_dp)
>  				    MTK_DP_PIX_PER_ADDR);
>  	mtk_dp_set_sram_read_start(mtk_dp, sram_read_start);
>  	mtk_dp_setup_encoder(mtk_dp);
> +	mtk_dp_audio_sample_arrange_disable(mtk_dp);
>  	mtk_dp_sdp_set_down_cnt_init_in_hblank(mtk_dp);
>  	mtk_dp_sdp_set_down_cnt_init(mtk_dp, sram_read_start);
>  }
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> index 84e38cef03c2..f38d6ff12afe 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> @@ -228,6 +228,11 @@
>  							 VIDEO_STABLE_C
> NT_THRD_DP_ENC1_P0 | \
>  							 SDP_DP13_EN_DP
> _ENC1_P0 | \
>  							 BS2BS_MODE_DP_
> ENC1_P0)
> +
> +#define MTK_DP_ENC1_P0_3374			0x3374
> +#define SDP_ASP_INSERT_IN_HBLANK_DP_ENC1_P0_MASK	BIT(12)
> +#define SDP_DOWN_ASP_CNT_INIT_DP_ENC1_P0_MASK		GENMASK
> (11, 0)
> +
>  #define MTK_DP_ENC1_P0_33F4			0x33f4
>  #define DP_ENC_DUMMY_RW_1_AUDIO_RST_EN			BIT(0)
>  #define DP_ENC_DUMMY_RW_1				BIT(9)