[PATCH v11 3/3] arm64: dts: mediatek: Initial mt8365-evk support

[Laurent Pinchart]

On Mon, Oct 16, 2023 at 04:48:06PM +0300, Laurent Pinchart wrote:
> Hello,
> 
> A bit of a late reply, but I've just noticed an issue related to this
> patch.
> 
> On Thu, Mar 09, 2023 at 10:35:01PM +0100, Bernhard Rosenkränzer wrote:
> > From: Fabien Parent <fparent at baylibre.com>
> > 
> > This adds minimal support for the Mediatek 8365 SOC and the EVK reference
> > board, allowing the board to boot to initramfs with serial port I/O.
> > 
> > Signed-off-by: Fabien Parent <fparent at baylibre.com>
> > [bero at baylibre.com: Removed parts depending on drivers that aren't upstream yet, cleanups, add CPU cache layout, add systimer, fix GIC]
> > Signed-off-by: Bernhard Rosenkränzer <bero at baylibre.com>
> > [aouledameur at baylibre.com: Fix systimer properties]
> > Signed-off-by: Amjad Ouled-Ameur <aouledameur at baylibre.com>
> > Signed-off-by: Alexandre Mergnat <amergnat at baylibre.com>
> > Tested-by: Kevin Hilman <khilman at baylibre.com>
> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> > ---
> >  arch/arm64/boot/dts/mediatek/Makefile       |   1 +
> >  arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 168 +++++++++
> >  arch/arm64/boot/dts/mediatek/mt8365.dtsi    | 377 ++++++++++++++++++++
> >  3 files changed, 546 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/mediatek/mt8365-evk.dts
> >  create mode 100644 arch/arm64/boot/dts/mediatek/mt8365.dtsi
> 
> [snip]
> 
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> > new file mode 100644
> > index 0000000000000..351197c453c91
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> > @@ -0,0 +1,377 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * (C) 2018 MediaTek Inc.
> > + * Copyright (C) 2022 BayLibre SAS
> > + * Fabien Parent <fparent at baylibre.com>
> > + * Bernhard Rosenkränzer <bero at baylibre.com>
> > + */
> > +#include <dt-bindings/clock/mediatek,mt8365-clk.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +#include <dt-bindings/phy/phy.h>
> > +
> > +/ {
> 
> [snip]
> 
> > +	soc {
> 
> [snip]
> 
> > +		infracfg: syscon at 10001000 {
> > +			compatible = "mediatek,mt8365-infracfg", "syscon";
> > +			reg = <0 0x10001000 0 0x1000>;
> > +			#clock-cells = <1>;
> > +		};
> 
> [snip]
> 
> > +		infracfg_nao: infracfg at 1020e000 {
> > +			compatible = "mediatek,mt8365-infracfg", "syscon";
> > +			reg = <0 0x1020e000 0 0x1000>;
> > +			#clock-cells = <1>;
> > +		};
> 
> These two nodes cause the infracfg clocks to be registered twice, with
> the second probe of the clk-mt8365 driver failing with -EEXIST.

These are the messages printed by v6.6-rc6:

[    0.540254] Failed to register clk ifr_pmic_tmr: -EEXIST
[    0.541003] clk-mt8365: probe of 1020e000.infracfg failed with error -17

> [snip]
> 
> > +	};
> 
> [snip]
> 
> > +};

-- 
Regards,

Laurent Pinchart