[PATCH v3 2/3] dt-bindings: phy: add mediatek MIPI CD-PHY module v0.5
Julien Stephan
jstephan at baylibre.com
Wed May 24 01:30:31 PDT 2023
From: Florian Sylvestre <fsylvestre at baylibre.com>
This adds the bindings, for the MIPI CD-PHY module v0.5 embedded in
some Mediatek soc, such as the mt8365
Signed-off-by: Florian Sylvestre <fsylvestre at baylibre.com>
Signed-off-by: Julien Stephan <jstephan at baylibre.com>
---
.../bindings/phy/mediatek,mt8365-csi-rx.yaml | 67 +++++++++++++++++++
MAINTAINERS | 6 ++
2 files changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/mediatek,mt8365-csi-rx.yaml
diff --git a/Documentation/devicetree/bindings/phy/mediatek,mt8365-csi-rx.yaml b/Documentation/devicetree/bindings/phy/mediatek,mt8365-csi-rx.yaml
new file mode 100644
index 000000000000..a1bd96a98051
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mediatek,mt8365-csi-rx.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2023 MediaTek, BayLibre
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/mediatek,mt8365-csi-rx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek Sensor Interface MIPI CSI CD-PHY
+
+maintainers:
+ - Julien Stephan <jstephan at baylibre.com>
+ - Andy Hsieh <andy.hsieh at mediatek.com>
+
+description:
+ The SENINF CD-PHY is a set of CD-PHY connected to the SENINF CSI-2
+ receivers. The number of PHYs depends on the SoC model.
+ Depending on the SoC model, each PHYs can be either CD-PHY or D-PHY only
+ capable.
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8365-csi-rx
+
+ reg:
+ maxItems: 1
+
+ '#phy-cells':
+ const: 0
+
+ mediatek,phy-type:
+ description:
+ Specify the phy type. Supported phy are D-PHY only or CD-PHY capable phys.
+ See include/dt-bindings/phy/phy.h for constants.
+ enum: [10, 13]
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+required:
+ - compatible
+ - reg
+ - mediatek,phy-type
+ - '#phy-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/phy/phy.h>
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ csi0_rx: phy at 11c10000 {
+ compatible = "mediatek,mt8365-csi-rx";
+ reg = <0 0x11c10000 0 0x2000>;
+ mediatek,phy-type = <PHY_TYPE_CDPHY>;
+ #phy-cells = <0>;
+ };
+
+ csi1_rx: phy at 11c12000 {
+ compatible = "mediatek,mt8365-csi-rx";
+ reg = <0 0x11c12000 0 0x2000>;
+ mediatek,phy-type = <PHY_TYPE_DPHY>;
+ #phy-cells = <0>;
+ };
+ };
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index b81e9fcc66cb..5da594fbb761 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13184,6 +13184,12 @@ F: Documentation/devicetree/bindings/media/mediatek-vpu.txt
F: drivers/media/platform/mediatek/vcodec/
F: drivers/media/platform/mediatek/vpu/
+MEDIATEK MIPI-CSI CDPHY DRIVER
+M: Julien Stephan <jstephan at baylibre.com>
+M: Andy Hsieh <andy.hsieh at mediatek.com>
+S: Supported
+F: Documentation/devicetree/bindings/phy/mediatek,mt8365-csi-rx.yaml
+
MEDIATEK MMC/SD/SDIO DRIVER
M: Chaotian Jing <chaotian.jing at mediatek.com>
S: Maintained
--
2.40.1
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