[PATCH v2 08/17] arm64: dts: mediatek: mt6795: Add support for the CMDQ/GCE mailbox
AngeloGioacchino Del Regno
angelogioacchino.delregno at collabora.com
Mon Mar 27 01:36:38 PDT 2023
In preparation for adding multimedia blocks, add the CMDQ/GCE mailbox.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index d63efb32e6bb..0f903e8fe70f 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/mediatek,mt6795-clk.h>
+#include <dt-bindings/gce/mediatek,mt6795-gce.h>
#include <dt-bindings/pinctrl/mt6795-pinfunc.h>
#include <dt-bindings/power/mt6795-power.h>
#include <dt-bindings/reset/mediatek,mt6795-resets.h>
@@ -401,6 +402,15 @@ fhctl: clock-controller at 10209f00 {
status = "disabled";
};
+ gce: mailbox at 10212000 {
+ compatible = "mediatek,mt6795-gce", "mediatek,mt8173-gce";
+ reg = <0 0x10212000 0 0x1000>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&infracfg CLK_INFRA_GCE>;
+ clock-names = "gce";
+ #mbox-cells = <2>;
+ };
+
gic: interrupt-controller at 10221000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
2.40.0
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