[PATCH net 2/7] net: dsa: mt7530: fix phylink for port 5 and fix port 5 modes
arinc9.unal at gmail.com
arinc9.unal at gmail.com
Sun Mar 26 07:08:13 PDT 2023
From: Arınç ÜNAL <arinc.unal at arinc9.com>
There're two call paths for setting up port 5:
mt7530_setup()
-> mt7530_setup_port5()
mt753x_phylink_mac_config()
-> mt753x_mac_config()
-> mt7530_mac_config()
-> mt7530_setup_port5()
The first call path is supposed to run when phy muxing is being used. In
this case, port 5 is somewhat of a hidden port. It won't be defined on the
devicetree so phylink can't be used to manage the port.
The second call path used to call mt7530_setup_port5() directly under case
5 on mt7530_phylink_mac_config() before it was moved to mt7530_mac_config()
with 88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding a
new hardware"). mt7530_setup_port5() will never run through this call path
because the current code on mt7530_setup() bypasses phylink for all cases
of port 5.
Leave it to phylink if port 5 is used as a CPU port or a user port. For the
cases of phy muxing or the port being disabled, call mt7530_setup_port5()
directly from mt7530_setup_port5() without involving phylink.
Move setting the interface and P5_DISABLED mode to a more specific
location. They're supposed to be overwritten if phy muxing is detected.
Add comments which explain the process.
Fixes: 38f790a80560 ("net: dsa: mt7530: Add support for port 5")
Tested-by: Arınç ÜNAL <arinc.unal at arinc9.com>
Signed-off-by: Arınç ÜNAL <arinc.unal at arinc9.com>
---
drivers/net/dsa/mt7530.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 62a4b899a961..eba356249ada 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2247,16 +2247,18 @@ mt7530_setup(struct dsa_switch *ds)
return ret;
/* Setup port 5 */
- priv->p5_intf_sel = P5_DISABLED;
- interface = PHY_INTERFACE_MODE_NA;
-
if (!dsa_is_unused_port(ds, 5)) {
+ /* Set the interface selection of port 5 to GMAC5 when it's used
+ * as a CPU port or a user port. Let phylink handle the rest.
+ */
priv->p5_intf_sel = P5_INTF_SEL_GMAC5;
- ret = of_get_phy_mode(dsa_to_port(ds, 5)->dn, &interface);
- if (ret && ret != -ENODEV)
- return ret;
} else {
- /* Scan the ethernet nodes. look for GMAC1, lookup used phy */
+ /* Scan the ethernet nodes. Look for GMAC1, lookup the used phy.
+ * Determine if phy muxing is defined and which phy to mux.
+ */
+ priv->p5_intf_sel = P5_DISABLED;
+ interface = PHY_INTERFACE_MODE_NA;
+
for_each_child_of_node(dn, mac_np) {
if (!of_device_is_compatible(mac_np,
"mediatek,eth-mac"))
@@ -2287,6 +2289,8 @@ mt7530_setup(struct dsa_switch *ds)
of_node_put(phy_node);
break;
}
+
+ mt7530_setup_port5(ds, interface);
}
#ifdef CONFIG_GPIOLIB
@@ -2297,8 +2301,6 @@ mt7530_setup(struct dsa_switch *ds)
}
#endif /* CONFIG_GPIOLIB */
- mt7530_setup_port5(ds, interface);
-
/* Flush the FDB table */
ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL);
if (ret < 0)
--
2.37.2
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