[PATCH v2 0/4] arm64: dts: mediatek: mt8186: More DVFS nodes
Chen-Yu Tsai
wenst at chromium.org
Fri Jun 9 00:29:01 PDT 2023
Hi,
This adds more of the DVFS stuff at the SoC .dtsi level. This includes
the CCI and GPU.
Changes since v1:
- Dropped opp-level property from CPU and CCI OPP tables
- Used "opp-supported-hw = <0xff>" for GPU base OPPs to denote "all
variations"
Please have a look and merge for this cycle if possible.
On another note, I'm still cleaning up the MT6366 regulator's binding.
We shouldn't upstream the boards until the PMIC is ready.
ChenYu
Chen-Yu Tsai (4):
arm64: dts: mediatek: mt8186: Add CCI node and CCI OPP table
arm64: dts: mediatek: mt8186: Wire up CPU frequency/voltage scaling
arm64: dts: mediatek: mt8186: Add GPU speed bin NVMEM cells
arm64: dts: mediatek: mt8186: Wire up GPU voltage/frequency scaling
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 490 ++++++++++++++++++++++-
1 file changed, 489 insertions(+), 1 deletion(-)
--
2.41.0.162.gfafddb0af9-goog
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