[PATCH net-next 08/30] net: dsa: mt7530: change p{5,6}_interface to p{5,6}_configured
Arınç ÜNAL
arinc.unal at arinc9.com
Sun Jun 4 06:14:31 PDT 2023
On 4.06.2023 16:07, Russell King (Oracle) wrote:
> On Sun, Jun 04, 2023 at 03:55:17PM +0300, Vladimir Oltean wrote:
>> On Sun, Jun 04, 2023 at 01:18:04PM +0100, Russell King (Oracle) wrote:
>>> I don't remember whether Vladimir's firmware validator will fail for
>>> mt753x if CPU ports are not fully described, but that would be well
>>> worth checking. If it does, then we can be confident that phylink
>>> will always be used, and those bypassing calls should not be necessary.
>>
>> It does, I've just retested this:
>>
>> [ 8.469152] mscc_felix 0000:00:00.5: OF node /soc/pcie at 1f0000000/ethernet-switch at 0,5/ports/port at 4 of CPU port 4 lacks the required "phy-handle", "fixed-link" or "managed" properties
>> [ 8.494571] mscc_felix 0000:00:00.5: error -EINVAL: Failed to register DSA switch
>> [ 8.502151] mscc_felix: probe of 0000:00:00.5 failed with error -22
>
> ... which isn't listed in dsa_switches_apply_workarounds[], and
> neither is mt753x. Thanks.
>
> So, that should be sufficient to know that the CPU port will always
> properly described, and thus bypassing phylink in mt753x for the CPU
> port should not be necessary.
Perfect! If I understand correctly, there's this code - specific to
MT7531 and MT7988 ports being used as CPU ports - which runs in addition
to what's in mt753x_phylink_mac_config():
mt7530_write(priv, MT7530_PMCR_P(port),
PMCR_CPU_PORT_SETTING(priv->id));
This should be put on mt753x_phylink_mac_config(), under priv->id ==
ID_MT7531, priv->id == ID_MT7988, and dsa_is_cpu_port(ds, port) checks?
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