[PATCH] mips: dts: ralink: reorder MT7621 clocks in Ethernet block

[Sergio Paracuellos]

On Sat, Jul 29, 2023 at 1:04 PM Rafał Miłecki <zajec5 at gmail.com> wrote:
>
> From: Rafał Miłecki <rafal at milecki.pl>
>
> Use order as specified in the binding (first "ethif" then "fe").
>
> This fixes:
> arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb: ethernet at 1e100000: clock-names:0: 'ethif' was expected
>         From schema: Documentation/devicetree/bindings/net/mediatek,net.yaml
> arch/mips/boot/dts/ralink/mt7621-tplink-hc220-g5-v1.dtb: ethernet at 1e100000: clock-names:1: 'fe' was expected
>         From schema: Documentation/devicetree/bindings/net/mediatek,net.yaml
>
> Fixes: 7a6ee0bbab25 ("mips: dts: ralink: add MT7621 SoC")
> Signed-off-by: Rafał Miłecki <rafal at milecki.pl>
> ---
>  arch/mips/boot/dts/ralink/mt7621.dtsi | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>

Acked-by: Sergio Paracuellos <sergio.paracuellos at gmail.com>

Thanks,
    Sergio Paracuellos