[PATCH v1 3/4] arm64: dts: mt8195: Align vppsys node to dtschema

[matthias.bgg at kernel.org]

From: Matthias Brugger <matthias.bgg at gmail.com>

As the node is a syscon, this has to be reflected in the compatible and
the node name.

Signed-off-by: Matthias Brugger <matthias.bgg at gmail.com>
---

 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 8f1264d5290bf..5261367031426 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1795,8 +1795,8 @@ mfgcfg: clock-controller at 13fbf000 {
 			#clock-cells = <1>;
 		};
 
-		vppsys0: clock-controller at 14000000 {
-			compatible = "mediatek,mt8195-vppsys0";
+		vppsys0: syscon at 14000000 {
+			compatible = "mediatek,mt8195-vppsys0", "syscon";
 			reg = <0 0x14000000 0 0x1000>;
 			#clock-cells = <1>;
 		};
@@ -1900,8 +1900,8 @@ larb8: larb at 14e05000 {
 			power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>;
 		};
 
-		vppsys1: clock-controller at 14f00000 {
-			compatible = "mediatek,mt8195-vppsys1";
+		vppsys1: syscon at 14f00000 {
+			compatible = "mediatek,mt8195-vppsys1", "syscon";
 			reg = <0 0x14f00000 0 0x1000>;
 			#clock-cells = <1>;
 		};
-- 
2.39.0