[PATCH RESEND 1/2] pwm: mtk-disp: Disable shadow registers before setting backlight values

[Alexandre Mergnat]

On 03/04/2023 15:30, AngeloGioacchino Del Regno wrote:
> If shadow registers usage is not desired, disable that before performing
> any write to CON0/1 registers in the .apply() callback, otherwise we may
> lose clkdiv or period/width updates.
> 
> Fixes: cd4b45ac449a ("pwm: Add MediaTek MT2701 display PWM driver support")
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> Reviewed-by: Nícolas F. R. A. Prado <nfraprado at collabora.com>
> Tested-by: Nícolas F. R. A. Prado <nfraprado at collabora.com>
> ---
>   drivers/pwm/pwm-mtk-disp.c | 24 +++++++++++++-----------
>   1 file changed, 13 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c
> index 692a06121b28..82b430d881a2 100644
> --- a/drivers/pwm/pwm-mtk-disp.c
> +++ b/drivers/pwm/pwm-mtk-disp.c
> @@ -138,6 +138,19 @@ static int mtk_disp_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
>   	high_width = mul_u64_u64_div_u64(state->duty_cycle, rate, div);
>   	value = period | (high_width << PWM_HIGH_WIDTH_SHIFT);
>   
> +	if (mdp->data->bls_debug && !mdp->data->has_commit) {
> +		/*
> +		 * For MT2701, disable double buffer before writing register
> +		 * and select manual mode and use PWM_PERIOD/PWM_HIGH_WIDTH.
> +		 */
> +		mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug,
> +					 mdp->data->bls_debug_mask,
> +					 mdp->data->bls_debug_mask);
> +		mtk_disp_pwm_update_bits(mdp, mdp->data->con0,
> +					 mdp->data->con0_sel,
> +					 mdp->data->con0_sel);
> +	}
> +
>   	mtk_disp_pwm_update_bits(mdp, mdp->data->con0,
>   				 PWM_CLKDIV_MASK,
>   				 clk_div << PWM_CLKDIV_SHIFT);
> @@ -152,17 +165,6 @@ static int mtk_disp_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
>   		mtk_disp_pwm_update_bits(mdp, mdp->data->commit,
>   					 mdp->data->commit_mask,
>   					 0x0);
> -	} else {
> -		/*
> -		 * For MT2701, disable double buffer before writing register
> -		 * and select manual mode and use PWM_PERIOD/PWM_HIGH_WIDTH.
> -		 */
> -		mtk_disp_pwm_update_bits(mdp, mdp->data->bls_debug,
> -					 mdp->data->bls_debug_mask,
> -					 mdp->data->bls_debug_mask);
> -		mtk_disp_pwm_update_bits(mdp, mdp->data->con0,
> -					 mdp->data->con0_sel,
> -					 mdp->data->con0_sel);
>   	}
>   
>   	mtk_disp_pwm_update_bits(mdp, DISP_PWM_EN, mdp->data->enable_mask,

Hi,

I've made a non-regression test for the mt8365-evk (i350-evk) board.
It's fine for me.

Reviewed-by: Alexandre Mergnat <amergnat at baylibre.com>
Tested-by: Alexandre Mergnat <amergnat at baylibre.com>

Regards,
Alex