[PATCH RESEND v3 6/9] drm/mediatek: Add gamma support different bank_size for other SoC

[CK Hu]

Hi, Jason:

On Mon, 2022-09-12 at 09:30 +0800, Jason-JH.Lin wrote:
> Add multiple bank support for mt8195.
> If bank size is 0 which means no bank support.
> 
> Signed-off-by: Jason-JH.Lin <jason-jh.lin at mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 45 +++++++++++++------
> ----
>  1 file changed, 26 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> index be82d15a5204..45da2b6206c8 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -21,6 +21,7 @@
>  #define GAMMA_LUT_EN					BIT(1)
>  #define GAMMA_DITHERING					BIT(2)
>  #define DISP_GAMMA_SIZE				0x0030
> +#define DISP_GAMMA_BANK				0x0100
>  #define DISP_GAMMA_LUT				0x0700
>  
>  #define LUT_10BIT_MASK				0x03ff
> @@ -33,6 +34,7 @@ struct mtk_disp_gamma_data {
>  	bool lut_diff;
>  	u16 lut_size;
>  	u8 lut_bits;
> +	u16 bank_size;
>  };
>  
>  /*
> @@ -75,9 +77,10 @@ void mtk_gamma_set_common(struct device *dev, void
> __iomem *regs, struct drm_crt
>  	struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
>  	bool lut_diff = false;
>  	u16 lut_size = LUT_SIZE_DEFAULT;
> +	u16 bank_size = lut_size;
>  	u8 lut_bits = LUT_BITS_DEFAULT;
>  	u8 shift_bits;
> -	unsigned int i, reg;
> +	unsigned int i, j, reg, bank_num;
>  	struct drm_color_lut *lut;
>  	void __iomem *lut_base;
>  	u32 word, mask;
> @@ -87,8 +90,10 @@ void mtk_gamma_set_common(struct device *dev, void
> __iomem *regs, struct drm_crt
>  		lut_diff = gamma->data->lut_diff;
>  		lut_size = gamma->data->lut_size;
>  		lut_bits = gamma->data->lut_bits;
> +		bank_size = gamma->data->bank_size;
>  	}
>  
> +	bank_num = lut_size / bank_size;
>  	shift_bits = LUT_INPUT_BITS - lut_bits;
>  	mask = GENMASK(lut_bits - 1, 0);
>  
> @@ -98,25 +103,27 @@ void mtk_gamma_set_common(struct device *dev,
> void __iomem *regs, struct drm_crt
>  		writel(reg, regs + DISP_GAMMA_CFG);
>  		lut_base = regs + DISP_GAMMA_LUT;
>  		lut = (struct drm_color_lut *)state->gamma_lut->data;
> -		for (i = 0; i < lut_size; i++) {
> -
> -			if (!lut_diff || (i % 2 == 0)) {
> -				word = (((lut[i].red >> shift_bits) &
> mask) << 20) +
> -					(((lut[i].green >> shift_bits)
> & mask) << 10) +
> -					((lut[i].blue >> shift_bits) &
> mask);
> -			} else {
> -				diff[0] = (lut[i].red >> shift_bits) -
> -					  (lut[i - 1].red >>
> shift_bits);
> -				diff[1] = (lut[i].green >> shift_bits)
> -
> -					  (lut[i - 1].green >>
> shift_bits);
> -				diff[2] = (lut[i].blue >> shift_bits) -
> -					  (lut[i - 1].blue >>
> shift_bits);
> -
> -				word = ((diff[0] & mask) << 20) +
> -					((diff[1] & mask) << 10) +
> -					(diff[2] & mask);
> +		for (j = 0; j < bank_num; j++) {
> +			writel(j, regs + DISP_GAMMA_BANK);

Does mt8173 and mt8183 has this register? If not, do not set this
register in mt8173 and mt8183.

Regards,
CK

> +			for (i = 0; i < bank_size; i++) {
> +				if (!lut_diff || (i % 2 == 0)) {
> +					word = (((lut[i].red >>
> shift_bits) & mask) << 20) +
> +						(((lut[i].green >>
> shift_bits) & mask) << 10) +
> +						((lut[i].blue >>
> shift_bits) & mask);
> +				} else {
> +					diff[0] = (lut[i].red >>
> shift_bits) -
> +						  (lut[i - 1].red >>
> shift_bits);
> +					diff[1] = (lut[i].green >>
> shift_bits) -
> +						  (lut[i - 1].green >>
> shift_bits);
> +					diff[2] = (lut[i].blue >>
> shift_bits) -
> +						  (lut[i - 1].blue >>
> shift_bits);
> +
> +					word = ((diff[0] & mask) << 20)
> +
> +						((diff[1] & mask) <<
> 10) +
> +						(diff[2] & mask);
> +				}
> +				writel(word, (lut_base + i * 4));
>  			}
> -			writel(word, (lut_base + i * 4));
>  		}
>  	}
>  }