[PATCH v10, 3/4] mailbox: mtk-cmdq: add gce ddr enable support flow

[CK Hu (胡俊光)]

Hi, Yongqiang:

On Mon, 2022-10-10 at 16:50 +0800, Yongqiang Niu wrote:
> add gce ddr enable control flow when gce suspend/resume
> 
> when all cmdq instruction task has been processed done,
> we need set this gce ddr enable to disable status to tell
> cmdq hardware gce there is none task need process, and the hardware
> can go into idle mode and no access ddr anymore, then the spm can go
> into suspend.
> 
> the original issue is gce still access ddr when cmdq suspend function
> call, but there is no task run.
> so, we need control gce access ddr with this flow.
> when cmdq suspend function, there is no task need process, we can
> disable gce access ddr, to make sure system go into suspend success.

Reviewed-by: CK Hu <ck.hu at mediatek.com>

> 
> Signed-off-by: Yongqiang Niu <yongqiang.niu at mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno at collabora.com>
> ---
>  drivers/mailbox/mtk-cmdq-mailbox.c | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
> b/drivers/mailbox/mtk-cmdq-mailbox.c
> index d2363c6b8b7a..53904511598d 100644
> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
> @@ -94,6 +94,18 @@ struct gce_plat {
>  	u32 gce_num;
>  };
>  
> +static void cmdq_sw_ddr_enable(struct cmdq *cmdq, bool enable)
> +{
> +	WARN_ON(clk_bulk_enable(cmdq->gce_num, cmdq->clocks));
> +
> +	if (enable)
> +		writel(GCE_DDR_EN | GCE_CTRL_BY_SW, cmdq->base +
> GCE_GCTL_VALUE);
> +	else
> +		writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE);
> +
> +	clk_bulk_disable(cmdq->gce_num, cmdq->clocks);
> +}
> +
>  u8 cmdq_get_shift_pa(struct mbox_chan *chan)
>  {
>  	struct cmdq *cmdq = container_of(chan->mbox, struct cmdq,
> mbox);
> @@ -322,6 +334,9 @@ static int cmdq_suspend(struct device *dev)
>  	if (task_running)
>  		dev_warn(dev, "exist running task(s) in suspend\n");
>  
> +	if (cmdq->sw_ddr_en)
> +		cmdq_sw_ddr_enable(cmdq, false);
> +
>  	clk_bulk_unprepare(cmdq->gce_num, cmdq->clocks);
>  
>  	return 0;
> @@ -333,6 +348,10 @@ static int cmdq_resume(struct device *dev)
>  
>  	WARN_ON(clk_bulk_prepare(cmdq->gce_num, cmdq->clocks));
>  	cmdq->suspended = false;
> +
> +	if (cmdq->sw_ddr_en)
> +		cmdq_sw_ddr_enable(cmdq, true);
> +
>  	return 0;
>  }
>  
> @@ -340,6 +359,9 @@ static int cmdq_remove(struct platform_device
> *pdev)
>  {
>  	struct cmdq *cmdq = platform_get_drvdata(pdev);
>  
> +	if (cmdq->sw_ddr_en)
> +		cmdq_sw_ddr_enable(cmdq, false);
> +
>  	clk_bulk_unprepare(cmdq->gce_num, cmdq->clocks);
>  	return 0;
>  }