[RFC v3 01/11] arm64: dts: mt7986: harmonize device node order
Matthias Brugger
matthias.bgg at gmail.com
Fri Nov 11 00:55:29 PST 2022
On 06/11/2022 09:50, Frank Wunderlich wrote:
> From: Sam Shih <sam.shih at mediatek.com>
>
> This arrange device tree nodes in alphabetical order.
>
> Signed-off-by: Sam Shih <sam.shih at mediatek.com>
> Signed-off-by: Frank Wunderlich <frank-w at public-files.de>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
Applied, thanks!
> ---
> i modified sams patch
>
> https://patchwork.kernel.org/project/linux-mediatek/patch/20220427124741.18245-2-sam.shih@mediatek.com/
>
> by moving pio-node up instead of moving uarts down to ensure alphabetical
> order for switch-/wifi-node.
>
> And moved uart0 and wifi in mt7986b-rfb too.
> ---
> arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 94 ++++++++++----------
> arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 22 ++---
> 2 files changed, 58 insertions(+), 58 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> index afe37b702eef..6189436fe31d 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> @@ -54,6 +54,53 @@ switch: switch at 0 {
> };
> };
>
> +&pio {
> + uart1_pins: uart1-pins {
> + mux {
> + function = "uart";
> + groups = "uart1";
> + };
> + };
> +
> + uart2_pins: uart2-pins {
> + mux {
> + function = "uart";
> + groups = "uart2";
> + };
> + };
> +
> + wf_2g_5g_pins: wf-2g-5g-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_2g", "wf_5g";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
> + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
> + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
> + "WF1_TOP_CLK", "WF1_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> +
> + wf_dbdc_pins: wf-dbdc-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_dbdc";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> +};
> +
> &switch {
> ports {
> #address-cells = <1>;
> @@ -121,50 +168,3 @@ &wifi {
> pinctrl-0 = <&wf_2g_5g_pins>;
> pinctrl-1 = <&wf_dbdc_pins>;
> };
> -
> -&pio {
> - uart1_pins: uart1-pins {
> - mux {
> - function = "uart";
> - groups = "uart1";
> - };
> - };
> -
> - uart2_pins: uart2-pins {
> - mux {
> - function = "uart";
> - groups = "uart2";
> - };
> - };
> -
> - wf_2g_5g_pins: wf-2g-5g-pins {
> - mux {
> - function = "wifi";
> - groups = "wf_2g", "wf_5g";
> - };
> - conf {
> - pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> - "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> - "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> - "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
> - "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
> - "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
> - "WF1_TOP_CLK", "WF1_TOP_DATA";
> - drive-strength = <4>;
> - };
> - };
> -
> - wf_dbdc_pins: wf-dbdc-pins {
> - mux {
> - function = "wifi";
> - groups = "wf_dbdc";
> - };
> - conf {
> - pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> - "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> - "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> - "WF0_TOP_CLK", "WF0_TOP_DATA";
> - drive-strength = <4>;
> - };
> - };
> -};
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> index 3443013b5971..7459ddb6b6f0 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> @@ -25,10 +25,6 @@ memory at 40000000 {
> };
> };
>
> -&uart0 {
> - status = "okay";
> -};
> -
> ð {
> status = "okay";
>
> @@ -99,13 +95,6 @@ fixed-link {
> };
> };
>
> -&wifi {
> - status = "okay";
> - pinctrl-names = "default", "dbdc";
> - pinctrl-0 = <&wf_2g_5g_pins>;
> - pinctrl-1 = <&wf_dbdc_pins>;
> -};
> -
> &pio {
> wf_2g_5g_pins: wf-2g-5g-pins {
> mux {
> @@ -138,3 +127,14 @@ conf {
> };
> };
> };
> +
> +&uart0 {
> + status = "okay";
> +};
> +
> +&wifi {
> + status = "okay";
> + pinctrl-names = "default", "dbdc";
> + pinctrl-0 = <&wf_2g_5g_pins>;
> + pinctrl-1 = <&wf_dbdc_pins>;
> +};
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