[PATCH v2 0/4] Mediatek MT6735 main clock and reset drivers
Yassine Oudjana
yassine.oudjana at gmail.com
Thu May 19 07:22:07 PDT 2022
This series adds support for the main clock and reset controllers on the
Mediatek MT6735 SoC:
- apmixedsys (global PLLs)
- topckgen (global divisors and muxes)
- infracfg (gates and resets for internal components)
- pericfg (gates and resets for peripherals)
MT6735 has other more specialized clock controllers, support for which is
not included in this series:
- imgsys (camera)
- mmsys (display)
- vdecsys (video decoder)
- audsys (audio)
Tested on a Samsung Galaxy Grand Prime+ "grandpplte" with MT6737T, a slight
variant of MT6735 with no known differences in the clock controllers.
Dependencies:
- clk: mediatek: Move to struct clk_hw provider APIs (series)
https://patchwork.kernel.org/project/linux-mediatek/cover/20220510104804.544597-1-wenst@chromium.org/
- Cleanup MediaTek clk reset drivers and support MT8192/MT8195 (series)
https://patchwork.kernel.org/project/linux-mediatek/cover/20220503093856.22250-1-rex-bc.chen@mediatek.com/
- Export required symbols to compile clk drivers as module (single patch)
https://patchwork.kernel.org/project/linux-mediatek/patch/20220518111652.223727-7-angelogioacchino.delregno@collabora.com/
- clk: mediatek: Improvements to simple probe/remove and reset controller unregistration
https://patchwork.kernel.org/project/linux-clk/cover/20220519134728.456643-1-y.oudjana@protonmail.com/
Above are dependencies for patch 4/4 only; DT bindings don't need them.
Changes since v1:
- Rebase on some pending patches (listed as dependencies above).
- Move common clock improvemenets to a separate series (last dependency
listed above).
- Use mtk_clk_simple_probe/remove after making them support several clock types
in said series.
- Combine all 4 drivers into one patch, and use one Kconfig symbol for all
following a conversation seen on a different series[1].
- Correct APLL2 registers in apmixedsys driver (were offset backwards by 0x4).
- Make irtx clock name lower case to match the other clocks.
[1] https://lore.kernel.org/linux-mediatek/CAGXv+5H4gF5GXzfk8mjkG4Kry8uCs1CQbKoViBuc9LC+XdHH=A@mail.gmail.com/
Yassine Oudjana (4):
dt-bindings: clock: Add Mediatek MT6735 clock bindings
dt-bindings: reset: Add MT6735 reset bindings
dt-bindings: arm: mediatek: Add MT6735 clock controller compatibles
clk: mediatek: Add drivers for MediaTek MT6735 main clock drivers
.../arm/mediatek/mediatek,infracfg.yaml | 8 +-
.../arm/mediatek/mediatek,pericfg.yaml | 1 +
.../bindings/clock/mediatek,apmixedsys.yaml | 4 +-
.../bindings/clock/mediatek,topckgen.yaml | 4 +-
MAINTAINERS | 16 +
drivers/clk/mediatek/Kconfig | 9 +
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt6735-apmixedsys.c | 235 ++++
drivers/clk/mediatek/clk-mt6735-infracfg.c | 205 ++++
drivers/clk/mediatek/clk-mt6735-pericfg.c | 301 +++++
drivers/clk/mediatek/clk-mt6735-topckgen.c | 1087 +++++++++++++++++
.../clock/mediatek,mt6735-apmixedsys.h | 16 +
.../clock/mediatek,mt6735-infracfg.h | 25 +
.../clock/mediatek,mt6735-pericfg.h | 37 +
.../clock/mediatek,mt6735-topckgen.h | 79 ++
.../reset/mediatek,mt6735-infracfg.h | 31 +
.../reset/mediatek,mt6735-pericfg.h | 31 +
17 files changed, 2085 insertions(+), 5 deletions(-)
create mode 100644 drivers/clk/mediatek/clk-mt6735-apmixedsys.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-infracfg.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-pericfg.c
create mode 100644 drivers/clk/mediatek/clk-mt6735-topckgen.c
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-apmixedsys.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-infracfg.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-pericfg.h
create mode 100644 include/dt-bindings/clock/mediatek,mt6735-topckgen.h
create mode 100644 include/dt-bindings/reset/mediatek,mt6735-infracfg.h
create mode 100644 include/dt-bindings/reset/mediatek,mt6735-pericfg.h
--
2.36.1
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