[PATCH v8 16/19] arm64: dts: mediatek: Add infra #reset-cells property for MT8195

Rex-BC Chen rex-bc.chen at mediatek.com
Sun Jun 19 23:40:46 PDT 2022


On Mon, 2022-05-23 at 14:00 +0800, Rex-BC Chen wrote:
> We will use mediatek clock reset as infracfg_ao reset instead of
> ti-syscon. To support this, remove property of ti reset and add
> property of #reset-cells for mediatek clock reset.
> 
> Signed-off-by: Rex-BC Chen <rex-bc.chen at mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno at collabora.com>
> Reviewed-by: Nícolas F. R. A. Prado <nfraprado at collabora.com>
> Tested-by: Nícolas F. R. A. Prado <nfraprado at collabora.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 ++-------------
>  1 file changed, 2 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index b57e620c2c72..db16eba9d475 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -10,7 +10,6 @@
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/phy/phy.h>
>  #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
> -#include <dt-bindings/reset/ti-syscon.h>
>  
>  / {
>  	compatible = "mediatek,mt8195";
> @@ -292,20 +291,10 @@
>  		};
>  
>  		infracfg_ao: syscon at 10001000 {
> -			compatible = "mediatek,mt8195-infracfg_ao",
> "syscon", "simple-mfd";
> +			compatible = "mediatek,mt8195-infracfg_ao",
> "syscon";
>  			reg = <0 0x10001000 0 0x1000>;
>  			#clock-cells = <1>;
> -
> -			infracfg_rst: reset-controller {
> -				compatible = "ti,syscon-reset";
> -				#reset-cells = <1>;
> -				ti,reset-bits = <
> -					0x140 18 0x144 18 0 0
> (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* pcie */
> -					0x120 0  0x124 0  0 0
> (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* thermal */
> -					0x730 10 0x734 10 0 0
> (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* thermal */
> -					0x150 5  0x154 5  0 0
> (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* svs gpu */
> -				>;
> -			};
> +			#reset-cells = <1>;
>  		};
>  
>  		pericfg: syscon at 10003000 {
> -- 
> 2.18.0
> 

Hello Matthias,

driver part is accepted by Setphen[1].
dts part is also reviewed.
Is these dts parts ok for you? (including patch 15 and 16)
Or should I send another series for dts part?

Thanks!

[1]: 
https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git/log/?h=clk-next

BRs,
Bo-Chen




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