[PATCH V3 2/2] dt-bindings: mediatek: Add axi clock in mt8173 dts example
AngeloGioacchino Del Regno
angelogioacchino.delregno at collabora.com
Mon Jul 11 03:22:13 PDT 2022
Il 08/07/22 04:15, Xiangsheng Hou ha scritto:
> For mt8173, it is needed to add the axi clock for dma mode.
>
> Signed-off-by: Xiangsheng Hou <xiangsheng.hou at mediatek.com>
> ---
> .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
> index 41e60fe4b09f..413b907eecf5 100644
> --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
> +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
> @@ -82,8 +82,8 @@ examples:
> compatible = "mediatek,mt8173-nor";
> reg = <0 0x1100d000 0 0xe0>;
> interrupts = <1>;
> - clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
> - clock-names = "spi", "sf";
> + clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, <&pericfg CLK_PERI_NFI>;
This is going over 100 columns, which is too many.
Please fix.
> + clock-names = "spi", "sf", "axi";
> #address-cells = <1>;
> #size-cells = <0>;
>
>
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