[PATCH] PCI: mediatek: Change MSI interrupt processing sequence

[Marc Zyngier]

On Fri, 28 Jan 2022 13:12:50 +0000,
Bjorn Helgaas <helgaas at kernel.org> wrote:
> 
> On Fri, Jan 28, 2022 at 08:57:16AM +0000, Marc Zyngier wrote:
> > On Thu, 27 Jan 2022 21:21:00 +0000,
> > Bjorn Helgaas <helgaas at kernel.org> wrote:
>
> Thanks a lot for taking a look at these, Marc!  Is there anything we
> can do to make all these drivers/pci/controller/* drivers more
> consistent and easier to review?  I found it very difficult to look
> across all of them and find similar design patterns.

It looks to me that a number of them are just wrapping the same
underlying IP block, most likely the DW controller (this looks to be
the case for at least the first two).

They probably all use different register and bit offsets, but it
should be possible to write a library abstracting all these details
and have a common handling for most of them. This would certainly go a
long way in making things more solid.

	M.

-- 
Without deviation from the norm, progress is not possible.