[PATCH v8.1, 3/7] arm64: dts: mt8192: Add thermal zone

[Krzysztof Kozlowski]

On 04/08/2022 15:09, bchihi at baylibre.com wrote:
> From: Balsam CHIHI <bchihi at baylibre.com>
> 
> This adds the thermal zone for the mt8192.
> 
> Signed-off-by: Balsam CHIHI <bchihi at baylibre.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8192.dtsi | 113 ++++++++++++++++++++++-
>  1 file changed, 112 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index cbae5a5ee4a0..3320b5c14ee3 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -1,6 +1,6 @@
>  // SPDX-License-Identifier: (GPL-2.0 OR MIT)
>  /*
> - * Copyright (C) 2020 MediaTek Inc.
> + * Copyright (C) 2022 MediaTek Inc.

This is unexpected, so it needs careful explanation.

>   * Author: Seiya Wang <seiya.wang at mediatek.com>
>   */
>  
> @@ -12,6 +12,7 @@
>  #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
>  #include <dt-bindings/phy/phy.h>
>  #include <dt-bindings/power/mt8192-power.h>
> +#include <dt-bindings/reset/mt8192-resets.h>
>  
>  / {
>  	compatible = "mediatek,mt8192";
> @@ -599,6 +600,28 @@ spi0: spi at 1100a000 {
>  			status = "disabled";
>  		};
>  
> +		lvts_ap: thermal-sensor at 1100b000 {
> +			compatible = "mediatek,mt8192-lvts-ap";
> +			#thermal-sensor-cells = <1>;
> +			reg = <0 0x1100b000 0 0x1000>;
> +			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
> +			clocks = <&infracfg CLK_INFRA_THERM>;
> +			resets = <&infracfg MT8192_INFRA_RST0_THERM_CTRL_SWRST>;
> +			nvmem-cells = <&lvts_e_data1>;
> +			nvmem-cell-names = "lvts_calib_data1";
> +		};
> +
> +		lvts_mcu: thermal-sensor at 11278000 {
> +			compatible = "mediatek,mt8192-lvts-mcu";
> +			#thermal-sensor-cells = <1>;
> +			reg = <0 0x11278000 0 0x1000>;
> +			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
> +			clocks = <&infracfg CLK_INFRA_THERM>;
> +			resets = <&infracfg MT8192_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
> +			nvmem-cells = <&lvts_e_data1>;
> +			nvmem-cell-names = "lvts_calib_data1";
> +		};
> +
>  		spi1: spi at 11010000 {
>  			compatible = "mediatek,mt8192-spi",
>  				     "mediatek,mt6765-spi";
> @@ -1457,4 +1480,92 @@ larb2: larb at 1f002000 {
>  			power-domains = <&spm MT8192_POWER_DOMAIN_MDP>;
>  		};
>  	};
> +
> +	thermal_zones: thermal-zones {
> +		cpu-big1-thermal {

Names look not matching DT schema.


Best regards,
Krzysztof