[PATCH] dt-bindings: arm: mediatek: mmsys: refine power and gce properties

[jason-jh.lin]

From: "Jason-JH.Lin" <jason-jh.lin at mediatek.com>

Power:
  Refine description and add item number for power-domains property.

GCE:
  Refine description and add item number for mboxes property and
  mediatek,gce-client-reg property.

Fixes: 1da90b8a7bae ("dt-bindings: arm: mediatek: mmsys: add power and gce properties")
Signed-off-by: Jason-JH.Lin <jason-jh.lin at mediatek.com>
---
 .../bindings/arm/mediatek/mediatek,mmsys.yaml | 29 +++++++++----------
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 6ad023eec193..6722f1b724ef 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -43,28 +43,27 @@ properties:
     maxItems: 1
 
   power-domains:
+    maxItems: 1
     description:
-      A phandle and PM domain specifier as defined by bindings
-      of the power controller specified by phandle. See
-      Documentation/devicetree/bindings/power/power-domain.yaml for details.
+      Each mmsys belongs to a power-domains. If mmsys wants to use PM
+      interface to control the power controller of mmsys, it should have
+      this property.
 
   mboxes:
+    minItems: 1
     description:
-      Using mailbox to communicate with GCE, it should have this
-      property and list of phandle, mailbox specifiers. See
-      Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
-    $ref: /schemas/types.yaml#/definitions/phandle-array
+      If using mailbox to communicate with GCE, it should have this
+      property. GCE will help configure the hardware settings for the
+      current mmsys data pipeline.
 
   mediatek,gce-client-reg:
-    description:
-      The register of client driver can be configured by gce with 4 arguments
-      defined in this property, such as phandle of gce, subsys id,
-      register offset and size.
-      Each subsys id is mapping to a base address of display function blocks
-      register which is defined in the gce header
-      include/dt-bindings/gce/<chip>-gce.h.
-    $ref: /schemas/types.yaml#/definitions/phandle-array
     maxItems: 1
+    items:
+      - items:
+          - description: phandle to GCE
+          - description: subsys id
+          - description: register offset
+          - description: register size
 
   "#clock-cells":
     const: 1
-- 
2.18.0