[PATCH V3 00/17] Cleanup MediaTek clk reset drivers and support MT8192/MT8195
Rex-BC Chen
rex-bc.chen at mediatek.com
Thu Apr 21 23:01:35 PDT 2022
In this series, we cleanup MediaTek clock reset drivers in clk/mediatek
folder. MediaTek clock reset driver is used to provide reset control
of modules controlled in clk, like infra_ao.
Changes for V3:
1. Modify drivers for reviewers' comments.
2. Add dt-binding patch for MT8192/MT8195 infra.
3. Add reset property of infra node for MT8192.
4. Use original function for simple operation.
Changes for V2:
1. Modify drivers for reviewers' comments.
2. Use simple reset to replace v1.
3. Recover v2 to set_clr.
4. Separate error handling to another patch.
5. Add support for input offset and bit from DT.
6. Add support for MT8192 and MT8195.
Rex-BC Chen (17):
clk: mediatek: reset: Add reset.h
clk: mediatek: reset: Fix written reset bit offset
clk: mediatek: reset: Refine and reorder functions in reset.c
clk: mediatek: reset: Extract common drivers to update function
clk: mediatek: reset: Merge and revise reset register function
clk: mediatek: reset: Revise structure to control reset register
clk: mediatek: reset: Add return for clock reset register function
clk: mediatek: reset: Add new register reset function with device
clk: mediatek: reset: Add support for input offset and bit from DT
clk: mediatek: reset: Add reset support for simple probe
dt-bindings: arm: mediatek: Add #reset-cells property for MT8192-sys-clock
dt-binding: mt8192: Add infra_ao reset bit
dt-bindings: arm: mediatek: Add #reset-cells property for MT8195-sys-clock
dt-binding: mt8195: Add infra_ao reset bit
clk: mediatek: reset: Add infra_ao reset support for MT8192
clk: mediatek: reset: Add infra_ao reset support for MT8195
arm64: dts: mediatek: Add infra #reset-cells property for MT8192
.../mediatek/mediatek,mt8192-sys-clock.yaml | 3 +
.../mediatek/mediatek,mt8195-sys-clock.yaml | 3 +
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 1 +
drivers/clk/mediatek/clk-mt2701-eth.c | 8 +-
drivers/clk/mediatek/clk-mt2701-g3d.c | 8 +-
drivers/clk/mediatek/clk-mt2701-hif.c | 8 +-
drivers/clk/mediatek/clk-mt2701.c | 19 +-
drivers/clk/mediatek/clk-mt2712.c | 19 +-
drivers/clk/mediatek/clk-mt7622-eth.c | 8 +-
drivers/clk/mediatek/clk-mt7622-hif.c | 10 +-
drivers/clk/mediatek/clk-mt7622.c | 19 +-
drivers/clk/mediatek/clk-mt7629-eth.c | 8 +-
drivers/clk/mediatek/clk-mt7629-hif.c | 10 +-
drivers/clk/mediatek/clk-mt8135.c | 19 +-
drivers/clk/mediatek/clk-mt8173.c | 19 +-
drivers/clk/mediatek/clk-mt8183.c | 8 +-
drivers/clk/mediatek/clk-mt8192.c | 11 +
drivers/clk/mediatek/clk-mt8195-infra_ao.c | 8 +
drivers/clk/mediatek/clk-mtk.c | 7 +
drivers/clk/mediatek/clk-mtk.h | 9 +-
drivers/clk/mediatek/reset.c | 202 +++++++++++++-----
drivers/clk/mediatek/reset.h | 36 ++++
include/dt-bindings/reset/mt8192-resets.h | 10 +
include/dt-bindings/reset/mt8195-resets.h | 7 +
24 files changed, 381 insertions(+), 79 deletions(-)
create mode 100644 drivers/clk/mediatek/reset.h
--
2.18.0
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