[PATCH v3 4/5] dt-bindings: spi: add binding doc for spi-mtk-snfi
Krzysztof Kozlowski
krzysztof.kozlowski at linaro.org
Mon Apr 4 06:52:19 PDT 2022
On 04/04/2022 15:18, Chuanhong Guo wrote:
> Add device-tree binding documentation for Mediatek SPI-NAND Flash
> Interface.
>
> Signed-off-by: Chuanhong Guo <gch981213 at gmail.com>
> ---
> Changes since v1:
> 1. add a blank line between properties in dt binding doc
> 2. rename ecc-engine to nand-ecc-engine for the generic properties
>
> Change since v2: none
>
> .../bindings/spi/mediatek,spi-mtk-snfi.yaml | 88 +++++++++++++++++++
> 1 file changed, 88 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml
>
> diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml
> new file mode 100644
> index 000000000000..7d57570ad617
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml
> @@ -0,0 +1,88 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: SPI-NAND flash controller for MediaTek ARM SoCs
> +
> +maintainers:
> + - Chuanhong Guo <gch981213 at gmail.com>
> +
> +description: |
> + The Mediatek SPI-NAND flash controller is an extended version of
> + the Mediatek NAND flash controller. It can perform standard SPI
> + instructions with one continuous write and one read for up-to 0xa0
> + bytes. It also supports typical SPI-NAND page cache operations
> + in single, dual or quad IO mode with piplined ECC encoding/decoding
> + using the accompanying ECC engine. There should be only one spi
> + slave device following generic spi bindings.
> +
> +allOf:
> + - $ref: /schemas/spi/spi-controller.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt7622-snand
> + - mediatek,mt7629-snand
> +
> + reg:
> + items:
> + - description: core registers
> +
> + interrupts:
> + items:
> + - description: NFI interrupt
> +
> + clocks:
> + items:
> + - description: clock used for the controller
> + - description: clock used for the SPI bus
> +
> + clock-names:
> + items:
> + - const: nfi_clk
> + - const: pad_clk
> +
> + nand-ecc-engine:
> + description: device-tree node of the accompanying ECC engine.
> + $ref: /schemas/types.yaml#/definitions/phandle
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - ecc-engine
Slightly slow down resends (max 1 per day). You sent v3 without giving a
chance to review this.
Wrong name here.
Best regards,
Krzysztof
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