[PATCH v9 4/4] arm64: dts: mediatek: add pinctrl support for mt7986b
Sam Shih
sam.shih at mediatek.com
Fri Oct 22 05:40:36 PDT 2021
Add mt7986b pinctrl node
Signed-off-by: Sam Shih <sam.shih at mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt7986b.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt7986b.dtsi b/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
index c3e56ea18638..2c873313e7a4 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
@@ -128,6 +128,27 @@ apmixedsys: apmixedsys at 1001e000 {
#clock-cells = <1>;
};
+ pio: pinctrl at 1001f000 {
+ compatible = "mediatek,mt7986b-pinctrl";
+ reg = <0 0x1001f000 0 0x1000>,
+ <0 0x11c30000 0 0x1000>,
+ <0 0x11c40000 0 0x1000>,
+ <0 0x11e20000 0 0x1000>,
+ <0 0x11e30000 0 0x1000>,
+ <0 0x11f00000 0 0x1000>,
+ <0 0x11f10000 0 0x1000>,
+ <0 0x1000b000 0 0x1000>;
+ reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt",
+ "iocfg_lb", "iocfg_tr", "iocfg_tl", "eint";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pio 0 0 41>, <&pio 66 66 35>;
+ interrupt-controller;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&gic>;
+ #interrupt-cells = <2>;
+ };
+
sgmiisys0: syscon at 10060000 {
compatible = "mediatek,mt7986-sgmiisys_0",
"syscon";
--
2.29.2
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