[PATCH 18/24] iommu/mediatek: Add mtk_iommu_bank_data structure

kernel test robot lkp at intel.com
Wed Jun 30 03:55:43 PDT 2021


Hi Yong,

I love your patch! Yet something to improve:

[auto build test ERROR on robh/for-next]
[also build test ERROR on linus/master v5.13 next-20210629]
[cannot apply to iommu/next mediatek/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Yong-Wu/MT8195-IOMMU-SUPPORT/20210630-103848
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm-allyesconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/62a17847a7123ec4214df02c30afad93be62900a
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Yong-Wu/MT8195-IOMMU-SUPPORT/20210630-103848
        git checkout 62a17847a7123ec4214df02c30afad93be62900a
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross O=build_dir ARCH=arm SHELL=/bin/bash drivers/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>

All errors (new ones prefixed by >>):

   In file included from include/linux/scatterlist.h:9,
                    from include/linux/dma-mapping.h:10,
                    from drivers/iommu/mtk_iommu_v1.c:15:
   drivers/iommu/mtk_iommu_v1.c: In function 'mtk_iommu_tlb_flush_all':
>> drivers/iommu/mtk_iommu_v1.c:131:8: error: 'struct mtk_iommu_data' has no member named 'base'
     131 |    data->base + REG_MMU_INV_SEL);
         |        ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   drivers/iommu/mtk_iommu_v1.c:132:34: error: 'struct mtk_iommu_data' has no member named 'base'
     132 |  writel_relaxed(F_ALL_INVLD, data->base + REG_MMU_INVALIDATE);
         |                                  ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   drivers/iommu/mtk_iommu_v1.c: In function 'mtk_iommu_tlb_flush_range':
   drivers/iommu/mtk_iommu_v1.c:143:7: error: 'struct mtk_iommu_data' has no member named 'base'
     143 |   data->base + REG_MMU_INV_SEL);
         |       ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   drivers/iommu/mtk_iommu_v1.c:145:7: error: 'struct mtk_iommu_data' has no member named 'base'
     145 |   data->base + REG_MMU_INVLD_START_A);
         |       ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   drivers/iommu/mtk_iommu_v1.c:147:7: error: 'struct mtk_iommu_data' has no member named 'base'
     147 |   data->base + REG_MMU_INVLD_END_A);
         |       ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   drivers/iommu/mtk_iommu_v1.c:148:38: error: 'struct mtk_iommu_data' has no member named 'base'
     148 |  writel_relaxed(F_MMU_INV_RANGE, data->base + REG_MMU_INVALIDATE);
         |                                      ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   In file included from include/linux/swab.h:5,
                    from arch/arm/include/asm/opcodes.h:86,
                    from arch/arm/include/asm/bug.h:7,
                    from include/linux/bug.h:5,
                    from include/linux/mmdebug.h:5,
                    from include/linux/mm.h:9,
                    from include/linux/memblock.h:13,
                    from drivers/iommu/mtk_iommu_v1.c:10:
   drivers/iommu/mtk_iommu_v1.c:150:38: error: 'struct mtk_iommu_data' has no member named 'base'
     150 |  ret = readl_poll_timeout_atomic(data->base + REG_MMU_CPE_DONE,
         |                                      ^~
   include/uapi/linux/swab.h:115:54: note: in definition of macro '__swab32'
     115 | #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
         |                                                      ^
   include/linux/byteorder/generic.h:89:21: note: in expansion of macro '__le32_to_cpu'
      89 | #define le32_to_cpu __le32_to_cpu
         |                     ^~~~~~~~~~~~~
   arch/arm/include/asm/io.h:303:32: note: in expansion of macro 'readl_relaxed'
     303 | #define readl(c)  ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
         |                                ^~~~~~~~~~~~~
   include/linux/iopoll.h:88:11: note: in expansion of macro 'readl'
      88 |   (val) = op(args); \
         |           ^~
   include/linux/iopoll.h:141:2: note: in expansion of macro 'read_poll_timeout_atomic'
     141 |  read_poll_timeout_atomic(op, val, cond, delay_us, timeout_us, false, addr)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/iopoll.h:159:2: note: in expansion of macro 'readx_poll_timeout_atomic'
     159 |  readx_poll_timeout_atomic(readl, addr, val, cond, delay_us, timeout_us)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:150:8: note: in expansion of macro 'readl_poll_timeout_atomic'
     150 |  ret = readl_poll_timeout_atomic(data->base + REG_MMU_CPE_DONE,
         |        ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:150:38: error: 'struct mtk_iommu_data' has no member named 'base'
     150 |  ret = readl_poll_timeout_atomic(data->base + REG_MMU_CPE_DONE,
         |                                      ^~
   include/uapi/linux/swab.h:115:54: note: in definition of macro '__swab32'
     115 | #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
         |                                                      ^
   include/linux/byteorder/generic.h:89:21: note: in expansion of macro '__le32_to_cpu'
      89 | #define le32_to_cpu __le32_to_cpu
         |                     ^~~~~~~~~~~~~
   arch/arm/include/asm/io.h:303:32: note: in expansion of macro 'readl_relaxed'
     303 | #define readl(c)  ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
         |                                ^~~~~~~~~~~~~
   include/linux/iopoll.h:93:12: note: in expansion of macro 'readl'
      93 |    (val) = op(args); \
         |            ^~
   include/linux/iopoll.h:141:2: note: in expansion of macro 'read_poll_timeout_atomic'
     141 |  read_poll_timeout_atomic(op, val, cond, delay_us, timeout_us, false, addr)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/iopoll.h:159:2: note: in expansion of macro 'readx_poll_timeout_atomic'
     159 |  readx_poll_timeout_atomic(readl, addr, val, cond, delay_us, timeout_us)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:150:8: note: in expansion of macro 'readl_poll_timeout_atomic'
     150 |  ret = readl_poll_timeout_atomic(data->base + REG_MMU_CPE_DONE,
         |        ^~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from include/linux/scatterlist.h:9,
                    from include/linux/dma-mapping.h:10,
                    from drivers/iommu/mtk_iommu_v1.c:15:
   drivers/iommu/mtk_iommu_v1.c:158:24: error: 'struct mtk_iommu_data' has no member named 'base'
     158 |  writel_relaxed(0, data->base + REG_MMU_CPE_DONE);
         |                        ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   drivers/iommu/mtk_iommu_v1.c: In function 'mtk_iommu_isr':
>> drivers/iommu/mtk_iommu_v1.c:164:37: error: 'struct mtk_iommu_data' has no member named 'm4u_dom'
     164 |  struct mtk_iommu_domain *dom = data->m4u_dom;
         |                                     ^~
   In file included from include/linux/swab.h:5,
                    from arch/arm/include/asm/opcodes.h:86,
                    from arch/arm/include/asm/bug.h:7,
                    from include/linux/bug.h:5,
                    from include/linux/mmdebug.h:5,
                    from include/linux/mm.h:9,
                    from include/linux/memblock.h:13,
                    from drivers/iommu/mtk_iommu_v1.c:10:
   drivers/iommu/mtk_iommu_v1.c:169:32: error: 'struct mtk_iommu_data' has no member named 'base'
     169 |  int_state = readl_relaxed(data->base + REG_MMU_FAULT_ST);
         |                                ^~
   include/uapi/linux/swab.h:115:54: note: in definition of macro '__swab32'
     115 | #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
         |                                                      ^
   include/linux/byteorder/generic.h:89:21: note: in expansion of macro '__le32_to_cpu'
      89 | #define le32_to_cpu __le32_to_cpu
         |                     ^~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:169:14: note: in expansion of macro 'readl_relaxed'
     169 |  int_state = readl_relaxed(data->base + REG_MMU_FAULT_ST);
         |              ^~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:170:33: error: 'struct mtk_iommu_data' has no member named 'base'
     170 |  fault_iova = readl_relaxed(data->base + REG_MMU_FAULT_VA);
         |                                 ^~
   include/uapi/linux/swab.h:115:54: note: in definition of macro '__swab32'
     115 | #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
         |                                                      ^
   include/linux/byteorder/generic.h:89:21: note: in expansion of macro '__le32_to_cpu'
      89 | #define le32_to_cpu __le32_to_cpu
         |                     ^~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:170:15: note: in expansion of macro 'readl_relaxed'
     170 |  fault_iova = readl_relaxed(data->base + REG_MMU_FAULT_VA);
         |               ^~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:173:31: error: 'struct mtk_iommu_data' has no member named 'base'
     173 |  fault_pa = readl_relaxed(data->base + REG_MMU_INVLD_PA);
         |                               ^~
   include/uapi/linux/swab.h:115:54: note: in definition of macro '__swab32'
     115 | #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
         |                                                      ^
   include/linux/byteorder/generic.h:89:21: note: in expansion of macro '__le32_to_cpu'
      89 | #define le32_to_cpu __le32_to_cpu
         |                     ^~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:173:13: note: in expansion of macro 'readl_relaxed'
     173 |  fault_pa = readl_relaxed(data->base + REG_MMU_INVLD_PA);
         |             ^~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:174:29: error: 'struct mtk_iommu_data' has no member named 'base'
     174 |  regval = readl_relaxed(data->base + REG_MMU_INT_ID);
         |                             ^~
   include/uapi/linux/swab.h:115:54: note: in definition of macro '__swab32'
     115 | #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
         |                                                      ^
   include/linux/byteorder/generic.h:89:21: note: in expansion of macro '__le32_to_cpu'
      89 | #define le32_to_cpu __le32_to_cpu
         |                     ^~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:174:11: note: in expansion of macro 'readl_relaxed'
     174 |  regval = readl_relaxed(data->base + REG_MMU_INT_ID);
         |           ^~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:190:29: error: 'struct mtk_iommu_data' has no member named 'base'
     190 |  regval = readl_relaxed(data->base + REG_MMU_INT_CONTROL);
         |                             ^~
   include/uapi/linux/swab.h:115:54: note: in definition of macro '__swab32'
     115 | #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
         |                                                      ^
   include/linux/byteorder/generic.h:89:21: note: in expansion of macro '__le32_to_cpu'
      89 | #define le32_to_cpu __le32_to_cpu
         |                     ^~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:190:11: note: in expansion of macro 'readl_relaxed'
     190 |  regval = readl_relaxed(data->base + REG_MMU_INT_CONTROL);
         |           ^~~~~~~~~~~~~
   In file included from include/linux/scatterlist.h:9,
                    from include/linux/dma-mapping.h:10,
                    from drivers/iommu/mtk_iommu_v1.c:15:
   drivers/iommu/mtk_iommu_v1.c:192:29: error: 'struct mtk_iommu_data' has no member named 'base'
     192 |  writel_relaxed(regval, data->base + REG_MMU_INT_CONTROL);
         |                             ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   drivers/iommu/mtk_iommu_v1.c: In function 'mtk_iommu_domain_finalise':
   drivers/iommu/mtk_iommu_v1.c:224:37: error: 'struct mtk_iommu_data' has no member named 'm4u_dom'
     224 |  struct mtk_iommu_domain *dom = data->m4u_dom;
         |                                     ^~
   In file included from include/linux/scatterlist.h:9,
                    from include/linux/dma-mapping.h:10,
                    from drivers/iommu/mtk_iommu_v1.c:15:
   drivers/iommu/mtk_iommu_v1.c:233:26: error: 'struct mtk_iommu_data' has no member named 'base'
     233 |  writel(dom->pgt_pa, data->base + REG_MMU_PT_BASE_ADDR);
         |                          ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   drivers/iommu/mtk_iommu_v1.c:233:2: note: in expansion of macro 'writel'
     233 |  writel(dom->pgt_pa, data->base + REG_MMU_PT_BASE_ADDR);
         |  ^~~~~~
   drivers/iommu/mtk_iommu_v1.c: In function 'mtk_iommu_attach_device':
   drivers/iommu/mtk_iommu_v1.c:277:11: error: 'struct mtk_iommu_data' has no member named 'm4u_dom'
     277 |  if (!data->m4u_dom) {
         |           ^~
   drivers/iommu/mtk_iommu_v1.c:278:7: error: 'struct mtk_iommu_data' has no member named 'm4u_dom'
     278 |   data->m4u_dom = dom;
         |       ^~
   drivers/iommu/mtk_iommu_v1.c:281:8: error: 'struct mtk_iommu_data' has no member named 'm4u_dom'
     281 |    data->m4u_dom = NULL;
         |        ^~
   In file included from include/linux/scatterlist.h:9,
                    from include/linux/dma-mapping.h:10,
                    from drivers/iommu/mtk_iommu_v1.c:15:
   drivers/iommu/mtk_iommu_v1.c: In function 'mtk_iommu_hw_init':
>> drivers/iommu/mtk_iommu_v1.c:488:29: error: 'const struct mtk_iommu_data' has no member named 'base'
     488 |  writel_relaxed(regval, data->base + REG_MMU_CTRL_REG);
         |                             ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   drivers/iommu/mtk_iommu_v1.c:498:29: error: 'const struct mtk_iommu_data' has no member named 'base'
     498 |  writel_relaxed(regval, data->base + REG_MMU_INT_CONTROL);
         |                             ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   drivers/iommu/mtk_iommu_v1.c:502:8: error: 'const struct mtk_iommu_data' has no member named 'base'
     502 |    data->base + REG_MMU_IVRP_PADDR);
         |        ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   drivers/iommu/mtk_iommu_v1.c:504:35: error: 'const struct mtk_iommu_data' has no member named 'base'
     504 |  writel_relaxed(F_MMU_DCM_ON, data->base + REG_MMU_DCM);
         |                                   ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
>> drivers/iommu/mtk_iommu_v1.c:506:38: error: 'const struct mtk_iommu_data' has no member named 'irq'
     506 |  if (devm_request_irq(data->dev, data->irq, mtk_iommu_isr, 0,
         |                                      ^~
   In file included from include/linux/scatterlist.h:9,
                    from include/linux/dma-mapping.h:10,
                    from drivers/iommu/mtk_iommu_v1.c:15:
   drivers/iommu/mtk_iommu_v1.c:508:25: error: 'const struct mtk_iommu_data' has no member named 'base'
     508 |   writel_relaxed(0, data->base + REG_MMU_PT_BASE_ADDR);
         |                         ^~
   arch/arm/include/asm/io.h:299:71: note: in definition of macro 'writel_relaxed'
     299 | #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
         |                                                                       ^
   In file included from include/linux/device.h:15,
                    from drivers/iommu/mtk_iommu_v1.c:14:
   drivers/iommu/mtk_iommu_v1.c:510:55: error: 'const struct mtk_iommu_data' has no member named 'irq'
     510 |   dev_err(data->dev, "Failed @ IRQ-%d Request\n", data->irq);
         |                                                       ^~
   include/linux/dev_printk.h:112:32: note: in definition of macro 'dev_err'
     112 |  _dev_err(dev, dev_fmt(fmt), ##__VA_ARGS__)
         |                                ^~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c: In function 'mtk_iommu_probe':
   drivers/iommu/mtk_iommu_v1.c:567:6: error: 'struct mtk_iommu_data' has no member named 'base'
     567 |  data->base = devm_ioremap_resource(dev, res);
         |      ^~
   drivers/iommu/mtk_iommu_v1.c:568:17: error: 'struct mtk_iommu_data' has no member named 'base'
     568 |  if (IS_ERR(data->base))
         |                 ^~
   drivers/iommu/mtk_iommu_v1.c:569:22: error: 'struct mtk_iommu_data' has no member named 'base'
     569 |   return PTR_ERR(data->base);
         |                      ^~
>> drivers/iommu/mtk_iommu_v1.c:571:6: error: 'struct mtk_iommu_data' has no member named 'irq'
     571 |  data->irq = platform_get_irq(pdev, 0);
         |      ^~
   drivers/iommu/mtk_iommu_v1.c:572:10: error: 'struct mtk_iommu_data' has no member named 'irq'
     572 |  if (data->irq < 0)
         |          ^~
   drivers/iommu/mtk_iommu_v1.c:573:14: error: 'struct mtk_iommu_data' has no member named 'irq'
     573 |   return data->irq;
         |              ^~
   drivers/iommu/mtk_iommu_v1.c: In function 'mtk_iommu_remove':
   drivers/iommu/mtk_iommu_v1.c:654:32: error: 'struct mtk_iommu_data' has no member named 'irq'
     654 |  devm_free_irq(&pdev->dev, data->irq, data);
         |                                ^~
   drivers/iommu/mtk_iommu_v1.c: In function 'mtk_iommu_suspend':
   drivers/iommu/mtk_iommu_v1.c:663:27: error: 'struct mtk_iommu_data' has no member named 'base'
     663 |  void __iomem *base = data->base;
         |                           ^~
   drivers/iommu/mtk_iommu_v1.c: In function 'mtk_iommu_resume':
   drivers/iommu/mtk_iommu_v1.c:677:27: error: 'struct mtk_iommu_data' has no member named 'base'
     677 |  void __iomem *base = data->base;
         |                           ^~
   In file included from include/linux/swab.h:5,
                    from arch/arm/include/asm/opcodes.h:86,
                    from arch/arm/include/asm/bug.h:7,
                    from include/linux/bug.h:5,
                    from include/linux/mmdebug.h:5,
                    from include/linux/mm.h:9,
                    from include/linux/memblock.h:13,
                    from drivers/iommu/mtk_iommu_v1.c:10:
   drivers/iommu/mtk_iommu_v1.c:679:21: error: 'struct mtk_iommu_data' has no member named 'm4u_dom'
     679 |  writel_relaxed(data->m4u_dom->pgt_pa, base + REG_MMU_PT_BASE_ADDR);
         |                     ^~
   include/uapi/linux/swab.h:115:54: note: in definition of macro '__swab32'
     115 | #define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
         |                                                      ^
   include/linux/byteorder/generic.h:88:21: note: in expansion of macro '__cpu_to_le32'
      88 | #define cpu_to_le32 __cpu_to_le32
         |                     ^~~~~~~~~~~~~
   drivers/iommu/mtk_iommu_v1.c:679:2: note: in expansion of macro 'writel_relaxed'
     679 |  writel_relaxed(data->m4u_dom->pgt_pa, base + REG_MMU_PT_BASE_ADDR);
         |  ^~~~~~~~~~~~~~


vim +131 drivers/iommu/mtk_iommu_v1.c

745b6e74704782 Arnd Bergmann    2017-05-11  @15  #include <linux/dma-mapping.h>
b17336c55d8928 Honghui Zhang    2016-06-08   16  #include <linux/dma-iommu.h>
b17336c55d8928 Honghui Zhang    2016-06-08   17  #include <linux/err.h>
b17336c55d8928 Honghui Zhang    2016-06-08   18  #include <linux/interrupt.h>
b17336c55d8928 Honghui Zhang    2016-06-08   19  #include <linux/io.h>
b17336c55d8928 Honghui Zhang    2016-06-08   20  #include <linux/iommu.h>
b17336c55d8928 Honghui Zhang    2016-06-08   21  #include <linux/iopoll.h>
b17336c55d8928 Honghui Zhang    2016-06-08   22  #include <linux/list.h>
8de000cf0265ea Yong Wu          2021-03-26   23  #include <linux/module.h>
b17336c55d8928 Honghui Zhang    2016-06-08   24  #include <linux/of_address.h>
b17336c55d8928 Honghui Zhang    2016-06-08   25  #include <linux/of_iommu.h>
b17336c55d8928 Honghui Zhang    2016-06-08   26  #include <linux/of_irq.h>
b17336c55d8928 Honghui Zhang    2016-06-08   27  #include <linux/of_platform.h>
b17336c55d8928 Honghui Zhang    2016-06-08   28  #include <linux/platform_device.h>
b17336c55d8928 Honghui Zhang    2016-06-08   29  #include <linux/slab.h>
b17336c55d8928 Honghui Zhang    2016-06-08   30  #include <linux/spinlock.h>
b17336c55d8928 Honghui Zhang    2016-06-08   31  #include <asm/barrier.h>
b17336c55d8928 Honghui Zhang    2016-06-08   32  #include <asm/dma-iommu.h>
d4cf5bbd56f5b7 Paul Gortmaker   2018-12-01   33  #include <linux/init.h>
b17336c55d8928 Honghui Zhang    2016-06-08   34  #include <dt-bindings/memory/mt2701-larb-port.h>
b17336c55d8928 Honghui Zhang    2016-06-08   35  #include <soc/mediatek/smi.h>
b17336c55d8928 Honghui Zhang    2016-06-08   36  #include "mtk_iommu.h"
b17336c55d8928 Honghui Zhang    2016-06-08   37  
b17336c55d8928 Honghui Zhang    2016-06-08   38  #define REG_MMU_PT_BASE_ADDR			0x000
b17336c55d8928 Honghui Zhang    2016-06-08   39  
b17336c55d8928 Honghui Zhang    2016-06-08   40  #define F_ALL_INVLD				0x2
b17336c55d8928 Honghui Zhang    2016-06-08   41  #define F_MMU_INV_RANGE				0x1
b17336c55d8928 Honghui Zhang    2016-06-08   42  #define F_INVLD_EN0				BIT(0)
b17336c55d8928 Honghui Zhang    2016-06-08   43  #define F_INVLD_EN1				BIT(1)
b17336c55d8928 Honghui Zhang    2016-06-08   44  
b17336c55d8928 Honghui Zhang    2016-06-08   45  #define F_MMU_FAULT_VA_MSK			0xfffff000
b17336c55d8928 Honghui Zhang    2016-06-08   46  #define MTK_PROTECT_PA_ALIGN			128
b17336c55d8928 Honghui Zhang    2016-06-08   47  
b17336c55d8928 Honghui Zhang    2016-06-08   48  #define REG_MMU_CTRL_REG			0x210
b17336c55d8928 Honghui Zhang    2016-06-08   49  #define F_MMU_CTRL_COHERENT_EN			BIT(8)
b17336c55d8928 Honghui Zhang    2016-06-08   50  #define REG_MMU_IVRP_PADDR			0x214
b17336c55d8928 Honghui Zhang    2016-06-08   51  #define REG_MMU_INT_CONTROL			0x220
b17336c55d8928 Honghui Zhang    2016-06-08   52  #define F_INT_TRANSLATION_FAULT			BIT(0)
b17336c55d8928 Honghui Zhang    2016-06-08   53  #define F_INT_MAIN_MULTI_HIT_FAULT		BIT(1)
b17336c55d8928 Honghui Zhang    2016-06-08   54  #define F_INT_INVALID_PA_FAULT			BIT(2)
b17336c55d8928 Honghui Zhang    2016-06-08   55  #define F_INT_ENTRY_REPLACEMENT_FAULT		BIT(3)
b17336c55d8928 Honghui Zhang    2016-06-08   56  #define F_INT_TABLE_WALK_FAULT			BIT(4)
b17336c55d8928 Honghui Zhang    2016-06-08   57  #define F_INT_TLB_MISS_FAULT			BIT(5)
b17336c55d8928 Honghui Zhang    2016-06-08   58  #define F_INT_PFH_DMA_FIFO_OVERFLOW		BIT(6)
b17336c55d8928 Honghui Zhang    2016-06-08   59  #define F_INT_MISS_DMA_FIFO_OVERFLOW		BIT(7)
b17336c55d8928 Honghui Zhang    2016-06-08   60  
b17336c55d8928 Honghui Zhang    2016-06-08   61  #define F_MMU_TF_PROTECT_SEL(prot)		(((prot) & 0x3) << 5)
b17336c55d8928 Honghui Zhang    2016-06-08   62  #define F_INT_CLR_BIT				BIT(12)
b17336c55d8928 Honghui Zhang    2016-06-08   63  
b17336c55d8928 Honghui Zhang    2016-06-08   64  #define REG_MMU_FAULT_ST			0x224
b17336c55d8928 Honghui Zhang    2016-06-08   65  #define REG_MMU_FAULT_VA			0x228
b17336c55d8928 Honghui Zhang    2016-06-08   66  #define REG_MMU_INVLD_PA			0x22C
b17336c55d8928 Honghui Zhang    2016-06-08   67  #define REG_MMU_INT_ID				0x388
b17336c55d8928 Honghui Zhang    2016-06-08   68  #define REG_MMU_INVALIDATE			0x5c0
b17336c55d8928 Honghui Zhang    2016-06-08   69  #define REG_MMU_INVLD_START_A			0x5c4
b17336c55d8928 Honghui Zhang    2016-06-08   70  #define REG_MMU_INVLD_END_A			0x5c8
b17336c55d8928 Honghui Zhang    2016-06-08   71  
b17336c55d8928 Honghui Zhang    2016-06-08   72  #define REG_MMU_INV_SEL				0x5d8
b17336c55d8928 Honghui Zhang    2016-06-08   73  #define REG_MMU_STANDARD_AXI_MODE		0x5e8
b17336c55d8928 Honghui Zhang    2016-06-08   74  
b17336c55d8928 Honghui Zhang    2016-06-08   75  #define REG_MMU_DCM				0x5f0
b17336c55d8928 Honghui Zhang    2016-06-08   76  #define F_MMU_DCM_ON				BIT(1)
b17336c55d8928 Honghui Zhang    2016-06-08   77  #define REG_MMU_CPE_DONE			0x60c
b17336c55d8928 Honghui Zhang    2016-06-08   78  #define F_DESC_VALID				0x2
b17336c55d8928 Honghui Zhang    2016-06-08   79  #define F_DESC_NONSEC				BIT(3)
b17336c55d8928 Honghui Zhang    2016-06-08   80  #define MT2701_M4U_TF_LARB(TF)			(6 - (((TF) >> 13) & 0x7))
b17336c55d8928 Honghui Zhang    2016-06-08   81  #define MT2701_M4U_TF_PORT(TF)			(((TF) >> 8) & 0xF)
b17336c55d8928 Honghui Zhang    2016-06-08   82  /* MTK generation one iommu HW only support 4K size mapping */
b17336c55d8928 Honghui Zhang    2016-06-08   83  #define MT2701_IOMMU_PAGE_SHIFT			12
b17336c55d8928 Honghui Zhang    2016-06-08   84  #define MT2701_IOMMU_PAGE_SIZE			(1UL << MT2701_IOMMU_PAGE_SHIFT)
b17336c55d8928 Honghui Zhang    2016-06-08   85  
b17336c55d8928 Honghui Zhang    2016-06-08   86  /*
b17336c55d8928 Honghui Zhang    2016-06-08   87   * MTK m4u support 4GB iova address space, and only support 4K page
b17336c55d8928 Honghui Zhang    2016-06-08   88   * mapping. So the pagetable size should be exactly as 4M.
b17336c55d8928 Honghui Zhang    2016-06-08   89   */
b17336c55d8928 Honghui Zhang    2016-06-08   90  #define M2701_IOMMU_PGT_SIZE			SZ_4M
b17336c55d8928 Honghui Zhang    2016-06-08   91  
b17336c55d8928 Honghui Zhang    2016-06-08   92  struct mtk_iommu_domain {
b17336c55d8928 Honghui Zhang    2016-06-08   93  	spinlock_t			pgtlock; /* lock for page table */
b17336c55d8928 Honghui Zhang    2016-06-08   94  	struct iommu_domain		domain;
b17336c55d8928 Honghui Zhang    2016-06-08   95  	u32				*pgt_va;
b17336c55d8928 Honghui Zhang    2016-06-08   96  	dma_addr_t			pgt_pa;
b17336c55d8928 Honghui Zhang    2016-06-08   97  	struct mtk_iommu_data		*data;
b17336c55d8928 Honghui Zhang    2016-06-08   98  };
b17336c55d8928 Honghui Zhang    2016-06-08   99  
b17336c55d8928 Honghui Zhang    2016-06-08  100  static struct mtk_iommu_domain *to_mtk_domain(struct iommu_domain *dom)
b17336c55d8928 Honghui Zhang    2016-06-08  101  {
b17336c55d8928 Honghui Zhang    2016-06-08  102  	return container_of(dom, struct mtk_iommu_domain, domain);
b17336c55d8928 Honghui Zhang    2016-06-08  103  }
b17336c55d8928 Honghui Zhang    2016-06-08  104  
b17336c55d8928 Honghui Zhang    2016-06-08  105  static const int mt2701_m4u_in_larb[] = {
b17336c55d8928 Honghui Zhang    2016-06-08  106  	LARB0_PORT_OFFSET, LARB1_PORT_OFFSET,
b17336c55d8928 Honghui Zhang    2016-06-08  107  	LARB2_PORT_OFFSET, LARB3_PORT_OFFSET
b17336c55d8928 Honghui Zhang    2016-06-08  108  };
b17336c55d8928 Honghui Zhang    2016-06-08  109  
b17336c55d8928 Honghui Zhang    2016-06-08  110  static inline int mt2701_m4u_to_larb(int id)
b17336c55d8928 Honghui Zhang    2016-06-08  111  {
b17336c55d8928 Honghui Zhang    2016-06-08  112  	int i;
b17336c55d8928 Honghui Zhang    2016-06-08  113  
b17336c55d8928 Honghui Zhang    2016-06-08  114  	for (i = ARRAY_SIZE(mt2701_m4u_in_larb) - 1; i >= 0; i--)
b17336c55d8928 Honghui Zhang    2016-06-08  115  		if ((id) >= mt2701_m4u_in_larb[i])
b17336c55d8928 Honghui Zhang    2016-06-08  116  			return i;
b17336c55d8928 Honghui Zhang    2016-06-08  117  
b17336c55d8928 Honghui Zhang    2016-06-08  118  	return 0;
b17336c55d8928 Honghui Zhang    2016-06-08  119  }
b17336c55d8928 Honghui Zhang    2016-06-08  120  
b17336c55d8928 Honghui Zhang    2016-06-08  121  static inline int mt2701_m4u_to_port(int id)
b17336c55d8928 Honghui Zhang    2016-06-08  122  {
b17336c55d8928 Honghui Zhang    2016-06-08  123  	int larb = mt2701_m4u_to_larb(id);
b17336c55d8928 Honghui Zhang    2016-06-08  124  
b17336c55d8928 Honghui Zhang    2016-06-08  125  	return id - mt2701_m4u_in_larb[larb];
b17336c55d8928 Honghui Zhang    2016-06-08  126  }
b17336c55d8928 Honghui Zhang    2016-06-08  127  
b17336c55d8928 Honghui Zhang    2016-06-08  128  static void mtk_iommu_tlb_flush_all(struct mtk_iommu_data *data)
b17336c55d8928 Honghui Zhang    2016-06-08  129  {
b17336c55d8928 Honghui Zhang    2016-06-08  130  	writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
b17336c55d8928 Honghui Zhang    2016-06-08 @131  			data->base + REG_MMU_INV_SEL);
b17336c55d8928 Honghui Zhang    2016-06-08  132  	writel_relaxed(F_ALL_INVLD, data->base + REG_MMU_INVALIDATE);
b17336c55d8928 Honghui Zhang    2016-06-08  133  	wmb(); /* Make sure the tlb flush all done */
b17336c55d8928 Honghui Zhang    2016-06-08  134  }
b17336c55d8928 Honghui Zhang    2016-06-08  135  
b17336c55d8928 Honghui Zhang    2016-06-08  136  static void mtk_iommu_tlb_flush_range(struct mtk_iommu_data *data,
b17336c55d8928 Honghui Zhang    2016-06-08  137  				unsigned long iova, size_t size)
b17336c55d8928 Honghui Zhang    2016-06-08  138  {
b17336c55d8928 Honghui Zhang    2016-06-08  139  	int ret;
b17336c55d8928 Honghui Zhang    2016-06-08  140  	u32 tmp;
b17336c55d8928 Honghui Zhang    2016-06-08  141  
b17336c55d8928 Honghui Zhang    2016-06-08  142  	writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
b17336c55d8928 Honghui Zhang    2016-06-08  143  		data->base + REG_MMU_INV_SEL);
b17336c55d8928 Honghui Zhang    2016-06-08  144  	writel_relaxed(iova & F_MMU_FAULT_VA_MSK,
b17336c55d8928 Honghui Zhang    2016-06-08  145  		data->base + REG_MMU_INVLD_START_A);
b17336c55d8928 Honghui Zhang    2016-06-08  146  	writel_relaxed((iova + size - 1) & F_MMU_FAULT_VA_MSK,
b17336c55d8928 Honghui Zhang    2016-06-08  147  		data->base + REG_MMU_INVLD_END_A);
b17336c55d8928 Honghui Zhang    2016-06-08  148  	writel_relaxed(F_MMU_INV_RANGE, data->base + REG_MMU_INVALIDATE);
b17336c55d8928 Honghui Zhang    2016-06-08  149  
b17336c55d8928 Honghui Zhang    2016-06-08  150  	ret = readl_poll_timeout_atomic(data->base + REG_MMU_CPE_DONE,
b17336c55d8928 Honghui Zhang    2016-06-08  151  				tmp, tmp != 0, 10, 100000);
b17336c55d8928 Honghui Zhang    2016-06-08  152  	if (ret) {
b17336c55d8928 Honghui Zhang    2016-06-08  153  		dev_warn(data->dev,
b17336c55d8928 Honghui Zhang    2016-06-08  154  			 "Partial TLB flush timed out, falling back to full flush\n");
b17336c55d8928 Honghui Zhang    2016-06-08  155  		mtk_iommu_tlb_flush_all(data);
b17336c55d8928 Honghui Zhang    2016-06-08  156  	}
b17336c55d8928 Honghui Zhang    2016-06-08  157  	/* Clear the CPE status */
b17336c55d8928 Honghui Zhang    2016-06-08  158  	writel_relaxed(0, data->base + REG_MMU_CPE_DONE);
b17336c55d8928 Honghui Zhang    2016-06-08  159  }
b17336c55d8928 Honghui Zhang    2016-06-08  160  
b17336c55d8928 Honghui Zhang    2016-06-08  161  static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
b17336c55d8928 Honghui Zhang    2016-06-08  162  {
b17336c55d8928 Honghui Zhang    2016-06-08  163  	struct mtk_iommu_data *data = dev_id;
b17336c55d8928 Honghui Zhang    2016-06-08 @164  	struct mtk_iommu_domain *dom = data->m4u_dom;
b17336c55d8928 Honghui Zhang    2016-06-08  165  	u32 int_state, regval, fault_iova, fault_pa;
b17336c55d8928 Honghui Zhang    2016-06-08  166  	unsigned int fault_larb, fault_port;
b17336c55d8928 Honghui Zhang    2016-06-08  167  
b17336c55d8928 Honghui Zhang    2016-06-08  168  	/* Read error information from registers */
b17336c55d8928 Honghui Zhang    2016-06-08  169  	int_state = readl_relaxed(data->base + REG_MMU_FAULT_ST);
b17336c55d8928 Honghui Zhang    2016-06-08  170  	fault_iova = readl_relaxed(data->base + REG_MMU_FAULT_VA);
b17336c55d8928 Honghui Zhang    2016-06-08  171  
b17336c55d8928 Honghui Zhang    2016-06-08  172  	fault_iova &= F_MMU_FAULT_VA_MSK;
b17336c55d8928 Honghui Zhang    2016-06-08  173  	fault_pa = readl_relaxed(data->base + REG_MMU_INVLD_PA);
b17336c55d8928 Honghui Zhang    2016-06-08  174  	regval = readl_relaxed(data->base + REG_MMU_INT_ID);
b17336c55d8928 Honghui Zhang    2016-06-08  175  	fault_larb = MT2701_M4U_TF_LARB(regval);
b17336c55d8928 Honghui Zhang    2016-06-08  176  	fault_port = MT2701_M4U_TF_PORT(regval);
b17336c55d8928 Honghui Zhang    2016-06-08  177  
b17336c55d8928 Honghui Zhang    2016-06-08  178  	/*
b17336c55d8928 Honghui Zhang    2016-06-08  179  	 * MTK v1 iommu HW could not determine whether the fault is read or
b17336c55d8928 Honghui Zhang    2016-06-08  180  	 * write fault, report as read fault.
b17336c55d8928 Honghui Zhang    2016-06-08  181  	 */
b17336c55d8928 Honghui Zhang    2016-06-08  182  	if (report_iommu_fault(&dom->domain, data->dev, fault_iova,
b17336c55d8928 Honghui Zhang    2016-06-08  183  			IOMMU_FAULT_READ))
b17336c55d8928 Honghui Zhang    2016-06-08  184  		dev_err_ratelimited(data->dev,
b17336c55d8928 Honghui Zhang    2016-06-08  185  			"fault type=0x%x iova=0x%x pa=0x%x larb=%d port=%d\n",
b17336c55d8928 Honghui Zhang    2016-06-08  186  			int_state, fault_iova, fault_pa,
b17336c55d8928 Honghui Zhang    2016-06-08  187  			fault_larb, fault_port);
b17336c55d8928 Honghui Zhang    2016-06-08  188  
b17336c55d8928 Honghui Zhang    2016-06-08  189  	/* Interrupt clear */
b17336c55d8928 Honghui Zhang    2016-06-08  190  	regval = readl_relaxed(data->base + REG_MMU_INT_CONTROL);
b17336c55d8928 Honghui Zhang    2016-06-08  191  	regval |= F_INT_CLR_BIT;
b17336c55d8928 Honghui Zhang    2016-06-08  192  	writel_relaxed(regval, data->base + REG_MMU_INT_CONTROL);
b17336c55d8928 Honghui Zhang    2016-06-08  193  
b17336c55d8928 Honghui Zhang    2016-06-08  194  	mtk_iommu_tlb_flush_all(data);
b17336c55d8928 Honghui Zhang    2016-06-08  195  
b17336c55d8928 Honghui Zhang    2016-06-08  196  	return IRQ_HANDLED;
b17336c55d8928 Honghui Zhang    2016-06-08  197  }
b17336c55d8928 Honghui Zhang    2016-06-08  198  
b17336c55d8928 Honghui Zhang    2016-06-08  199  static void mtk_iommu_config(struct mtk_iommu_data *data,
b17336c55d8928 Honghui Zhang    2016-06-08  200  			     struct device *dev, bool enable)
b17336c55d8928 Honghui Zhang    2016-06-08  201  {
b17336c55d8928 Honghui Zhang    2016-06-08  202  	struct mtk_smi_larb_iommu    *larb_mmu;
b17336c55d8928 Honghui Zhang    2016-06-08  203  	unsigned int                 larbid, portid;
a9bf2eec5a6fc0 Joerg Roedel     2018-11-29  204  	struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
84672f192671e6 Robin Murphy     2016-10-17  205  	int i;
b17336c55d8928 Honghui Zhang    2016-06-08  206  
84672f192671e6 Robin Murphy     2016-10-17  207  	for (i = 0; i < fwspec->num_ids; ++i) {
84672f192671e6 Robin Murphy     2016-10-17  208  		larbid = mt2701_m4u_to_larb(fwspec->ids[i]);
84672f192671e6 Robin Murphy     2016-10-17  209  		portid = mt2701_m4u_to_port(fwspec->ids[i]);
1ee9feb2c9f893 Yong Wu          2019-08-24  210  		larb_mmu = &data->larb_imu[larbid];
b17336c55d8928 Honghui Zhang    2016-06-08  211  
b17336c55d8928 Honghui Zhang    2016-06-08  212  		dev_dbg(dev, "%s iommu port: %d\n",
b17336c55d8928 Honghui Zhang    2016-06-08  213  			enable ? "enable" : "disable", portid);
b17336c55d8928 Honghui Zhang    2016-06-08  214  
b17336c55d8928 Honghui Zhang    2016-06-08  215  		if (enable)
b17336c55d8928 Honghui Zhang    2016-06-08  216  			larb_mmu->mmu |= MTK_SMI_MMU_EN(portid);
b17336c55d8928 Honghui Zhang    2016-06-08  217  		else
b17336c55d8928 Honghui Zhang    2016-06-08  218  			larb_mmu->mmu &= ~MTK_SMI_MMU_EN(portid);
b17336c55d8928 Honghui Zhang    2016-06-08  219  	}
b17336c55d8928 Honghui Zhang    2016-06-08  220  }
b17336c55d8928 Honghui Zhang    2016-06-08  221  
b17336c55d8928 Honghui Zhang    2016-06-08  222  static int mtk_iommu_domain_finalise(struct mtk_iommu_data *data)
b17336c55d8928 Honghui Zhang    2016-06-08  223  {
b17336c55d8928 Honghui Zhang    2016-06-08  224  	struct mtk_iommu_domain *dom = data->m4u_dom;
b17336c55d8928 Honghui Zhang    2016-06-08  225  
b17336c55d8928 Honghui Zhang    2016-06-08  226  	spin_lock_init(&dom->pgtlock);
b17336c55d8928 Honghui Zhang    2016-06-08  227  
750afb08ca7131 Luis Chamberlain 2019-01-04  228  	dom->pgt_va = dma_alloc_coherent(data->dev, M2701_IOMMU_PGT_SIZE,
b17336c55d8928 Honghui Zhang    2016-06-08  229  					 &dom->pgt_pa, GFP_KERNEL);
b17336c55d8928 Honghui Zhang    2016-06-08  230  	if (!dom->pgt_va)
b17336c55d8928 Honghui Zhang    2016-06-08  231  		return -ENOMEM;
b17336c55d8928 Honghui Zhang    2016-06-08  232  
b17336c55d8928 Honghui Zhang    2016-06-08  233  	writel(dom->pgt_pa, data->base + REG_MMU_PT_BASE_ADDR);
b17336c55d8928 Honghui Zhang    2016-06-08  234  
b17336c55d8928 Honghui Zhang    2016-06-08  235  	dom->data = data;
b17336c55d8928 Honghui Zhang    2016-06-08  236  
b17336c55d8928 Honghui Zhang    2016-06-08  237  	return 0;
b17336c55d8928 Honghui Zhang    2016-06-08  238  }
b17336c55d8928 Honghui Zhang    2016-06-08  239  
b17336c55d8928 Honghui Zhang    2016-06-08  240  static struct iommu_domain *mtk_iommu_domain_alloc(unsigned type)
b17336c55d8928 Honghui Zhang    2016-06-08  241  {
b17336c55d8928 Honghui Zhang    2016-06-08  242  	struct mtk_iommu_domain *dom;
b17336c55d8928 Honghui Zhang    2016-06-08  243  
b17336c55d8928 Honghui Zhang    2016-06-08  244  	if (type != IOMMU_DOMAIN_UNMANAGED)
b17336c55d8928 Honghui Zhang    2016-06-08  245  		return NULL;
b17336c55d8928 Honghui Zhang    2016-06-08  246  
b17336c55d8928 Honghui Zhang    2016-06-08  247  	dom = kzalloc(sizeof(*dom), GFP_KERNEL);
b17336c55d8928 Honghui Zhang    2016-06-08  248  	if (!dom)
b17336c55d8928 Honghui Zhang    2016-06-08  249  		return NULL;
b17336c55d8928 Honghui Zhang    2016-06-08  250  
b17336c55d8928 Honghui Zhang    2016-06-08  251  	return &dom->domain;
b17336c55d8928 Honghui Zhang    2016-06-08  252  }
b17336c55d8928 Honghui Zhang    2016-06-08  253  
b17336c55d8928 Honghui Zhang    2016-06-08  254  static void mtk_iommu_domain_free(struct iommu_domain *domain)
b17336c55d8928 Honghui Zhang    2016-06-08  255  {
b17336c55d8928 Honghui Zhang    2016-06-08  256  	struct mtk_iommu_domain *dom = to_mtk_domain(domain);
b17336c55d8928 Honghui Zhang    2016-06-08  257  	struct mtk_iommu_data *data = dom->data;
b17336c55d8928 Honghui Zhang    2016-06-08  258  
b17336c55d8928 Honghui Zhang    2016-06-08  259  	dma_free_coherent(data->dev, M2701_IOMMU_PGT_SIZE,
b17336c55d8928 Honghui Zhang    2016-06-08  260  			dom->pgt_va, dom->pgt_pa);
b17336c55d8928 Honghui Zhang    2016-06-08  261  	kfree(to_mtk_domain(domain));
b17336c55d8928 Honghui Zhang    2016-06-08  262  }
b17336c55d8928 Honghui Zhang    2016-06-08  263  
b17336c55d8928 Honghui Zhang    2016-06-08  264  static int mtk_iommu_attach_device(struct iommu_domain *domain,
b17336c55d8928 Honghui Zhang    2016-06-08  265  				   struct device *dev)
b17336c55d8928 Honghui Zhang    2016-06-08  266  {
3524b5592cad63 Joerg Roedel     2020-03-26  267  	struct mtk_iommu_data *data = dev_iommu_priv_get(dev);
b17336c55d8928 Honghui Zhang    2016-06-08  268  	struct mtk_iommu_domain *dom = to_mtk_domain(domain);
8bbe13f52cb796 Yong Wu          2020-05-15  269  	struct dma_iommu_mapping *mtk_mapping;
b17336c55d8928 Honghui Zhang    2016-06-08  270  	int ret;
b17336c55d8928 Honghui Zhang    2016-06-08  271  
8bbe13f52cb796 Yong Wu          2020-05-15  272  	/* Only allow the domain created internally. */
589601720d9d03 Joerg Roedel     2020-06-25  273  	mtk_mapping = data->mapping;
8bbe13f52cb796 Yong Wu          2020-05-15  274  	if (mtk_mapping->domain != domain)
8bbe13f52cb796 Yong Wu          2020-05-15  275  		return 0;
b17336c55d8928 Honghui Zhang    2016-06-08  276  
b17336c55d8928 Honghui Zhang    2016-06-08  277  	if (!data->m4u_dom) {
b17336c55d8928 Honghui Zhang    2016-06-08  278  		data->m4u_dom = dom;
b17336c55d8928 Honghui Zhang    2016-06-08  279  		ret = mtk_iommu_domain_finalise(data);
b17336c55d8928 Honghui Zhang    2016-06-08  280  		if (ret) {
b17336c55d8928 Honghui Zhang    2016-06-08 @281  			data->m4u_dom = NULL;
b17336c55d8928 Honghui Zhang    2016-06-08  282  			return ret;
b17336c55d8928 Honghui Zhang    2016-06-08  283  		}
b17336c55d8928 Honghui Zhang    2016-06-08  284  	}
b17336c55d8928 Honghui Zhang    2016-06-08  285  
b17336c55d8928 Honghui Zhang    2016-06-08  286  	mtk_iommu_config(data, dev, true);
b17336c55d8928 Honghui Zhang    2016-06-08  287  	return 0;
b17336c55d8928 Honghui Zhang    2016-06-08  288  }
b17336c55d8928 Honghui Zhang    2016-06-08  289  

---
0-DAY CI Kernel Test Service, Intel Corporation
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