[PATCH v2 6/9] soc: mediatek: add mtk-mutex support for mt8195 vdosys0
Jason-JH Lin
jason-jh.lin at mediatek.com
Fri Jul 16 01:08:56 PDT 2021
On Wed, 2021-07-14 at 18:04 +0200, Matthias Brugger wrote:
>
> On 10/07/2021 13:38, jason-jh.lin wrote:
> > Add mtk-mutex support for mt8195 vdosys0.
> >
> > Signed-off-by: jason-jh.lin <jason-jh.lin at mediatek.com>
> > ---
> > drivers/soc/mediatek/mtk-mutex.c | 107
> > +++++++++++++++++++++++++++++--
> > 1 file changed, 102 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/soc/mediatek/mtk-mutex.c
> > b/drivers/soc/mediatek/mtk-mutex.c
> > index 2e4bcc300576..d74eb3f97f1d 100644
> > --- a/drivers/soc/mediatek/mtk-mutex.c
> > +++ b/drivers/soc/mediatek/mtk-mutex.c
> > @@ -17,6 +17,9 @@
> > #define MT8183_MUTEX0_MOD0 0x30
> > #define MT8183_MUTEX0_SOF0 0x2c
> >
> > +#define MT8195_DISP_MUTEX0_MOD0 0x30
> > +#define MT8195_DISP_MUTEX0_SOF 0x2c
> > +
> > #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 *
> > (n))
> > #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
> > #define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 *
> > (n))
> > @@ -67,6 +70,36 @@
> > #define MT8173_MUTEX_MOD_DISP_PWM1 24
> > #define MT8173_MUTEX_MOD_DISP_OD 25
> >
> > +#define MT8195_MUTEX_MOD_DISP_OVL0 0
> > +#define MT8195_MUTEX_MOD_DISP_WDMA0 1
> > +#define MT8195_MUTEX_MOD_DISP_RDMA0 2
> > +#define MT8195_MUTEX_MOD_DISP_COLOR0 3
> > +#define MT8195_MUTEX_MOD_DISP_CCORR0 4
> > +#define MT8195_MUTEX_MOD_DISP_AAL0 5
> > +#define MT8195_MUTEX_MOD_DISP_GAMMA0 6
> > +#define MT8195_MUTEX_MOD_DISP_DITHER0 7
> > +#define MT8195_MUTEX_MOD_DISP_DSI0 8
> > +#define MT8195_MUTEX_MOD_DISP_DSC_WRAP0_CORE0 9
> > +#define MT8195_MUTEX_MOD_DISP_OVL1 10
> > +#define MT8195_MUTEX_MOD_DISP_WDMA1 11
> > +#define MT8195_MUTEX_MOD_DISP_RDMA1 12
> > +#define MT8195_MUTEX_MOD_DISP_COLOR1 13
> > +#define MT8195_MUTEX_MOD_DISP_CCORR1 14
> > +#define MT8195_MUTEX_MOD_DISP_AAL1 15
> > +#define MT8195_MUTEX_MOD_DISP_GAMMA1 16
> > +#define MT8195_MUTEX_MOD_DISP_DITHER1 17
> > +#define MT8195_MUTEX_MOD_DISP_DSI1 18
> > +#define MT8195_MUTEX_MOD_DISP_DSC_WRAP0_CORE1 19
> > +#define MT8195_MUTEX_MOD_DISP_VPP_MERGE 20
> > +#define MT8195_MUTEX_MOD_DISP_DP_INTF0 21
> > +#define MT8195_MUTEX_MOD_DISP_VPP1_DL_RELAY0 22
> > +#define MT8195_MUTEX_MOD_DISP_VPP1_DL_RELAY1 23
> > +#define MT8195_MUTEX_MOD_DISP_VDO1_DL_RELAY2 24
> > +#define MT8195_MUTEX_MOD_DISP_VDO0_DL_RELAY3 25
> > +#define MT8195_MUTEX_MOD_DISP_VDO0_DL_RELAY4 26
> > +#define MT8195_MUTEX_MOD_DISP_PWM0 27
> > +#define MT8195_MUTEX_MOD_DISP_PWM1 28
> > +
> > #define MT2712_MUTEX_MOD_DISP_PWM2 10
> > #define MT2712_MUTEX_MOD_DISP_OVL0 11
> > #define MT2712_MUTEX_MOD_DISP_OVL1 12
> > @@ -101,11 +134,36 @@
> > #define MT2712_MUTEX_SOF_DSI3 6
> > #define MT8167_MUTEX_SOF_DPI0 2
> > #define MT8167_MUTEX_SOF_DPI1 3
> > +
> > #define MT8183_MUTEX_SOF_DSI0 1
> > #define MT8183_MUTEX_SOF_DPI0 2
> >
> > -#define MT8183_MUTEX_EOF_DSI0 (MT8183_MUTEX_S
> > OF_DSI0 << 6)
> > -#define MT8183_MUTEX_EOF_DPI0 (MT8183_MUTEX_S
> > OF_DPI0 << 6)
> > +#define MT8183_MUTEX_EOF_CONVERT(sof) ((sof) << 6)
> > +#define MT8183_MUTEX_EOF_DSI0 \
> > + MT8183_MUTEX_EOF_CONVERT(MT8183_MUTEX_SOF_DSI0)
> > +#define MT8183_MUTEX_EOF_DPI0 \
> > + MT8183_MUTEX_EOF_CONVERT(MT8183_MUTEX_SOF_DPI0)
>
> Not needed here, please drop.
>
> > +
> > +#define MT8195_MUTEX_SOF_DSI0 1
> > +#define MT8195_MUTEX_SOF_DSI1 2
> > +#define MT8195_MUTEX_SOF_DP_INTF0 3
> > +#define MT8195_MUTEX_SOF_DP_INTF1 4
> > +#define MT8195_MUTEX_SOF_DPI0 6 /* for
> > HDMI_TX */
> > +#define MT8195_MUTEX_SOF_DPI1 5 /* for
> > digital video out */
> > +
> > +#define MT8195_MUTEX_EOF_CONVERT(sof) ((sof) << 7)
>
> Same here.
>
> Regards,
> Matthias
Hi Matthias,
Ok, I will drop this at the next version.
Regards,
Jason-JH.Lin
--
Jason-JH Lin <jason-jh.lin at mediatek.com>
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