[PATCH v6 00/33] MT8192 IOMMU support
Will Deacon
will at kernel.org
Tue Feb 2 08:33:58 EST 2021
On Tue, Feb 02, 2021 at 10:03:45AM +0800, Yong Wu wrote:
> On Mon, 2021-02-01 at 14:54 +0000, Will Deacon wrote:
> > On Mon, Jan 11, 2021 at 07:18:41PM +0800, Yong Wu wrote:
> > > This patch mainly adds support for mt8192 Multimedia IOMMU and SMI.
> > >
> > > mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> > > table format. The M4U-SMI HW diagram is as below:
> > >
> > > EMI
> > > |
> > > M4U
> > > |
> > > ------------
> > > SMI Common
> > > ------------
> > > |
> > > +-------+------+------+----------------------+-------+
> > > | | | | ...... | |
> > > | | | | | |
> > > larb0 larb1 larb2 larb4 ...... larb19 larb20
> > > disp0 disp1 mdp vdec IPE IPE
> > >
> > > All the connections are HW fixed, SW can NOT adjust it.
> > >
> > > Comparing with the preview SoC, this patchset mainly adds two new functions:
> > > a) add iova 34 bits support.
> > > b) add multi domains support since several HW has the special iova
> > > region requirement.
> > >
> > > change note:
> > > v6:a) base on v5.11-rc1. and tlb v4:
> > > https://lore.kernel.org/linux-mediatek/20210107122909.16317-1-yong.wu@mediatek.com/T/#t
> >
> > I've queued this up apart from patches 6 and 7.
>
> Thanks very much for the applying. I'd like to show there is a little
> conflict with a smi change[1] in /include/soc/mediatek/smi.h.
>
> This is the detailed conflict:
>
> --- a/include/soc/mediatek/smi.h
> +++ b/include/soc/mediatek/smi.h
> @@ -9,7 +9,7 @@
> #include <linux/bitops.h>
> #include <linux/device.h>
>
> -#ifdef CONFIG_MTK_SMI
> +#if IS_ENABLED(CONFIG_MTK_SMI) <---The smi patch change here.
>
> #define MTK_LARB_NR_MAX 16 <---This iommu patchset delete this line.
>
>
> This code is simple. Please feel free to tell me how to do this if this
> is not convenient to merge.
Thanks, but this should be trivial to resolve, so I don't think we need to
worry about it.
Will
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