[RFC PATCH 2/5] drm/mediatek: dpi: Add dpintf support

CK Hu ck.hu at mediatek.com
Tue Aug 17 02:50:44 PDT 2021


Hi, Markus:

On Mon, 2021-08-16 at 21:25 +0200, Markus Schneider-Pargmann wrote:
> dpintf is the displayport interface hardware unit. This unit is similar
> to dpi and can reuse most of the code.
> 
> This patch adds support for mt8195-dpintf to this dpi driver. Main
> differences are:
>  - Some features/functional components are not available for dpintf
>    which are now excluded from code execution once is_dpintf is set
>  - dpintf can and needs to choose between different clockdividers based
>    on the clockspeed. This is done by choosing a different clock parent.
>  - There are two additional clocks that need to be managed. These are
>    only set for dpintf and will be set to NULL if not supplied. The
>    clk_* calls handle these as normal clocks then.
>  - Some register contents differ slightly between the two components. To
>    work around this I added register bits/masks with a DPINTF_ prefix
>    and use them where different.
> 
> Based on a separate driver for dpintf created by
> Jason-JH.Lin <jason-jh.lin at mediatek.com>.
> 
> Signed-off-by: Markus Schneider-Pargmann <msp at baylibre.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dpi.c      | 282 ++++++++++++++++++++----
>  drivers/gpu/drm/mediatek/mtk_dpi_regs.h |  12 +
>  2 files changed, 247 insertions(+), 47 deletions(-)
> 

[snip]

>  
> +static void mtk_dpi_set_pixel_clk_parent(struct mtk_dpi *dpi,
> +					 unsigned int factor)
> +{
> +	struct clk *new_parent;
> +
> +	switch (factor) {
> +	case 16:
> +		new_parent = dpi->tvd_clks[MTK_DPI_TVDPLL_D16].clk;
> +		break;
> +	case 8:
> +		new_parent = dpi->tvd_clks[MTK_DPI_TVDPLL_D8].clk;
> +		break;
> +	case 4:
> +		new_parent = dpi->tvd_clks[MTK_DPI_TVDPLL_D4].clk;
> +		break;
> +	case 2:
> +		new_parent = dpi->tvd_clks[MTK_DPI_TVDPLL_D2].clk;
> +		break;
> +	default:
> +		new_parent = NULL;
> +	}
> +	if (new_parent)
> +		clk_set_parent(dpi->pixel_clk, new_parent);

I prefer that dpi->pixel_clk provide set_rate() interface, and let clock
driver to control the parent of dpi->pixel_clk.

Regards,
CK

> +}
> +
>  static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
>  				    struct drm_display_mode *mode)
>  {
> @@ -465,6 +568,8 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
>  	drm_display_mode_to_videomode(mode, &vm);
>  	pll_rate = vm.pixelclock * factor;
>  
> +	mtk_dpi_set_pixel_clk_parent(dpi, factor);
> +
>  	dev_dbg(dpi->dev, "Want PLL %lu Hz, pixel clock %lu Hz\n",
>  		pll_rate, vm.pixelclock);
>  




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