[RFC PATCH 5/5] drm/mediatek: Add mt8195 DisplayPort driver
Markus Schneider-Pargmann
msp at baylibre.com
Tue Aug 17 00:35:30 PDT 2021
Hi,
On Tue, Aug 17, 2021 at 01:36:45PM +0800, CK Hu wrote:
> Hi, Markus:
>
> On Mon, 2021-08-16 at 21:25 +0200, Markus Schneider-Pargmann wrote:
> > This patch adds a DisplayPort driver for the Mediatek mt8195 SoC.
> >
> > It supports both functional units on the mt8195, the embedded
> > DisplayPort as well as the external DisplayPort units. It offers
> > hot-plug-detection, audio up to 8 channels, and DisplayPort 1.4 with up
> > to 4 lanes.
> >
> > This driver is based on an initial version by
> > Jason-JH.Lin <jason-jh.lin at mediatek.com>.
> >
> > Signed-off-by: Markus Schneider-Pargmann <msp at baylibre.com>
> > ---
>
> [snip]
>
> > +
> > +static const struct of_device_id mtk_dp_of_match[] = {
> > + {
> > + .compatible = "mediatek,mt8195-dp_tx",
>
> Where is the binding document of "mediatek,mt8195-dp_tx"?
>
> > + .data = &mt8195_dp_driver_data,
> > + },
> > + {
> > + .compatible = "mediatek,mt8195-edp_tx",
>
> Where is the binding document of "mediatek,mt8195-edp_tx"?
I didn't include the bindings in this RFC, but will include them in the
next version.
>
> > + .data = &mt8195_edp_driver_data,
> > + },
> > + {},
> > +};
> > +MODULE_DEVICE_TABLE(of, mtk_dp_of_match);
> > +
> > +struct platform_driver mtk_dp_driver = {
> > + .probe = mtk_dp_probe,
> > + .remove = mtk_dp_remove,
> > + .driver = {
> > + .name = "mediatek-drm-dp",
> > + .of_match_table = mtk_dp_of_match,
> > + .pm = &mtk_dp_pm_ops,
> > + },
> > +};
> > +
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> > new file mode 100644
> > index 000000000000..83afc79d98ff
> > --- /dev/null
> > +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> > @@ -0,0 +1,3095 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright (c) 2019 MediaTek Inc.
> > + * Copyright (c) 2021 BayLibre
> > + */
> > +#ifndef _MTK_DP_REG_H_
> > +#define _MTK_DP_REG_H_
> > +
> > +#define MTK_DP_SIP_CONTROL_AARCH32 0x82000523
> > +# define MTK_DP_SIP_ATF_VIDEO_UNMUTE 0x20
> > +# define MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE 0x21
> > +# define MTK_DP_SIP_ATF_REG_WRITE 0x22
> > +# define MTK_DP_SIP_ATF_REG_READ 0x23
> > +# define MTK_DP_SIP_ATF_CMD_COUNT 0x24
> > +
> > +#define TOP_OFFSET 0x2000
> > +#define ENC0_OFFSET 0x3000
> > +#define ENC1_OFFSET 0x3200
> > +#define TRANS_OFFSET 0x3400
> > +#define AUX_OFFSET 0x3600
> > +#define SEC_OFFSET 0x4000
> > +
> > +#define MTK_DP_HPD_DISCONNECT BIT(1)
> > +#define MTK_DP_HPD_CONNECT BIT(2)
> > +#define MTK_DP_HPD_INTERRUPT BIT(3)
> > +
> > +#define MTK_DP_ENC0_P0_3000 (ENC0_OFFSET + 0x000)
> > +# define LANE_NUM_DP_ENC0_P0_MASK 0x3
> > +# define LANE_NUM_DP_ENC0_P0_SHIFT 0
> > +# define VIDEO_MUTE_SW_DP_ENC0_P0_MASK 0x4
> > +# define VIDEO_MUTE_SW_DP_ENC0_P0_SHIFT 2
> > +# define VIDEO_MUTE_SEL_DP_ENC0_P0_MASK 0x8
> > +# define VIDEO_MUTE_SEL_DP_ENC0_P0_SHIFT 3
> > +# define ENHANCED_FRAME_EN_DP_ENC0_P0_MASK 0x10
> > +# define ENHANCED_FRAME_EN_DP_ENC0_P0_SHIFT 4
> > +# define HDCP_FRAME_EN_DP_ENC0_P0_MASK 0x20
> > +# define HDCP_FRAME_EN_DP_ENC0_P0_SHIFT 5
> > +# define IDP_EN_DP_ENC0_P0_MASK 0x40
>
> Remove useless definition.
Ok, will do. Thanks for the feedback.
Best,
Markus
>
> Regards,
> CK.
>
> > +# define IDP_EN_DP_ENC0_P0_SHIFT 6
> > +# define BS_SYMBOL_CNT_RESET_DP_ENC0_P0_MASK 0x80
> > +# define BS_SYMBOL_CNT_RESET_DP_ENC0_P0_SHIFT 7
> > +# define MIXER_DUMMY_DATA_DP_ENC0_P0_MASK 0xff00
> > +# define MIXER_DUMMY_DATA_DP_ENC0_P0_SHIFT 8
> > +
>
> > +
> > +#endif /*_MTK_DP_REG_H_*/
>
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