[RESEND PATCH v7 00/22] Mediatek MT8192 clock support
Ikjoon Jang
ikjn at chromium.org
Wed Apr 28 07:44:18 BST 2021
ping again.
On Thu, Apr 8, 2021 at 7:29 PM 20181221120906 created
<chun-jie.chen at mediatek.com> wrote:
>
> On Wed, 2021-03-24 at 18:40 +0800, Chun-Jie Chen (陳浚桀) wrote:
>
> Hi Maintainers,
>
> Gentle pin for this patch series.
>
> Thanks
>
> > reason for resending v7:
> > - add review history from series below
> > [1] https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=405295__;!!CTRNKA9wMg0ARbw!yiC4Bd7Av9itRUTEQeBUWbH_wX08o2rIYTH0BJ_BljLXWzCPb2sYdGLjFLwWBXEY4iHa$
> >
> > change since v6:
> > - update from series below
> > [1] https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=405295__;!!CTRNKA9wMg0ARbw!yiC4Bd7Av9itRUTEQeBUWbH_wX08o2rIYTH0BJ_BljLXWzCPb2sYdGLjFLwWBXEY4iHa$
> > - fix DT bindings fail
> > - fix checkpatch warning
> > - update mux ops without gate control
> >
> > change since v5:
> > - remove unused clocks by rolling Tinghan's patches[1][2] into series
> > [1] https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=398781__;!!CTRNKA9wMg0ARbw!yiC4Bd7Av9itRUTEQeBUWbH_wX08o2rIYTH0BJ_BljLXWzCPb2sYdGLjFLwWBS6llsNi$
> > [2] https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/list/?series=405143__;!!CTRNKA9wMg0ARbw!yiC4Bd7Av9itRUTEQeBUWbH_wX08o2rIYTH0BJ_BljLXWzCPb2sYdGLjFLwWBfBntgEt$
> > - remove dts related patches from series
> >
> > change since v4:
> > - merge some subsystem into same driver
> > - add a generic probe function to reduce duplicated code
> >
> > changes since v3:
> > - add critical clocks
> > - split large patches into small ones
> >
> > changes since v2:
> > - update and split dt-binding documents by functionalities
> > - add error checking in probe() function
> > - fix incorrect clock relation and add critical clocks
> > - update license identifier and minor fix of coding style
> >
> > changes since v1:
> > - fix asymmetrical control of PLL
> > - have en_mask used as divider enable mask on all MediaTek SoC
> >
> > chun-jie.chen (22):
> > dt-bindings: ARM: Mediatek: Add new document bindings of imp i2c
> > wrapper controller
> > dt-bindings: ARM: Mediatek: Add new document bindings of mdpsys
> > controller
> > dt-bindings: ARM: Mediatek: Add new document bindings of msdc
> > controller
> > dt-bindings: ARM: Mediatek: Add new document bindings of scp adsp
> > controller
> > dt-bindings: ARM: Mediatek: Document bindings of MT8192 clock
> > controllers
> > clk: mediatek: Add dt-bindings of MT8192 clocks
> > clk: mediatek: Fix asymmetrical PLL enable and disable control
> > clk: mediatek: Add configurable enable control to mtk_pll_data
> > clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers
> > clk: mediatek: Add MT8192 basic clocks support
> > clk: mediatek: Add MT8192 audio clock support
> > clk: mediatek: Add MT8192 camsys clock support
> > clk: mediatek: Add MT8192 imgsys clock support
> > clk: mediatek: Add MT8192 imp i2c wrapper clock support
> > clk: mediatek: Add MT8192 ipesys clock support
> > clk: mediatek: Add MT8192 mdpsys clock support
> > clk: mediatek: Add MT8192 mfgcfg clock support
> > clk: mediatek: Add MT8192 mmsys clock support
> > clk: mediatek: Add MT8192 msdc clock support
> > clk: mediatek: Add MT8192 scp adsp clock support
> > clk: mediatek: Add MT8192 vdecsys clock support
> > clk: mediatek: Add MT8192 vencsys clock support
> >
> > .../arm/mediatek/mediatek,apmixedsys.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,audsys.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,camsys.txt | 22 +
> > .../bindings/arm/mediatek/mediatek,imgsys.txt | 2 +
> > .../arm/mediatek/mediatek,imp_iic_wrap.yaml | 80 +
> > .../arm/mediatek/mediatek,infracfg.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,ipesys.txt | 1 +
> > .../arm/mediatek/mediatek,mdpsys.yaml | 40 +
> > .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,msdc.yaml | 48 +
> > .../arm/mediatek/mediatek,pericfg.yaml | 1 +
> > .../arm/mediatek/mediatek,scp-adsp.yaml | 40 +
> > .../arm/mediatek/mediatek,topckgen.txt | 1 +
> > .../arm/mediatek/mediatek,vdecsys.txt | 8 +
> > .../arm/mediatek/mediatek,vencsys.txt | 1 +
> > drivers/clk/mediatek/Kconfig | 80 +
> > drivers/clk/mediatek/Makefile | 13 +
> > drivers/clk/mediatek/clk-mt8192-aud.c | 118 ++
> > drivers/clk/mediatek/clk-mt8192-cam.c | 107 ++
> > drivers/clk/mediatek/clk-mt8192-img.c | 70 +
> > .../clk/mediatek/clk-mt8192-imp_iic_wrap.c | 119 ++
> > drivers/clk/mediatek/clk-mt8192-ipe.c | 57 +
> > drivers/clk/mediatek/clk-mt8192-mdp.c | 82 +
> > drivers/clk/mediatek/clk-mt8192-mfg.c | 50 +
> > drivers/clk/mediatek/clk-mt8192-mm.c | 108 ++
> > drivers/clk/mediatek/clk-mt8192-msdc.c | 85 ++
> > drivers/clk/mediatek/clk-mt8192-scp_adsp.c | 50 +
> > drivers/clk/mediatek/clk-mt8192-vdec.c | 94 ++
> > drivers/clk/mediatek/clk-mt8192-venc.c | 53 +
> > drivers/clk/mediatek/clk-mt8192.c | 1326 +++++++++++++++++
> > drivers/clk/mediatek/clk-mtk.c | 23 +
> > drivers/clk/mediatek/clk-mtk.h | 28 +-
> > drivers/clk/mediatek/clk-mux.c | 9 +-
> > drivers/clk/mediatek/clk-mux.h | 18 +-
> > drivers/clk/mediatek/clk-pll.c | 31 +-
> > include/dt-bindings/clock/mt8192-clk.h | 585 ++++++++
> > 37 files changed, 3335 insertions(+), 20 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,imp_iic_wrap.yaml
> > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mdpsys.yaml
> > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml
> > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,scp-adsp.yaml
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-aud.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-cam.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-img.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-ipe.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-mdp.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-mfg.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-mm.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-msdc.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-scp_adsp.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-vdec.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192-venc.c
> > create mode 100644 drivers/clk/mediatek/clk-mt8192.c
> > create mode 100644 include/dt-bindings/clock/mt8192-clk.h
> >
> > --
> > 2.18.0
> >
> >
> > _______________________________________________
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>
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