[v2,2/3] PCI: mediatek: Add new generation controller support

[Jianjun Wang]

On Fri, 2020-09-11 at 16:33 +0200, Philipp Zabel wrote:
> Hi Jianjun,
> 
> On Thu, 2020-09-10 at 11:45 +0800, Jianjun Wang wrote:
> > MediaTek's PCIe host controller has three generation HWs, the new
> > generation HW is an individual bridge, it supoorts Gen3 speed and
> > up to 256 MSI interrupt numbers for multi-function devices.
> > 
> > Add support for new Gen3 controller which can be found on MT8192.
> > 
> > Signed-off-by: Jianjun Wang <jianjun.wang at mediatek.com>
> > Acked-by: Ryder Lee <ryder.lee at mediatek.com>
> > ---
> >  drivers/pci/controller/Kconfig              |   14 +
> >  drivers/pci/controller/Makefile             |    1 +
> >  drivers/pci/controller/pcie-mediatek-gen3.c | 1076 +++++++++++++++++++
> >  3 files changed, 1091 insertions(+)
> >  create mode 100644 drivers/pci/controller/pcie-mediatek-gen3.c
> > 
> [...]
> > diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c
> > new file mode 100644
> > index 000000000000..f8c8bdf88d33
> > --- /dev/null
> > +++ b/drivers/pci/controller/pcie-mediatek-gen3.c
> [...]
> > +static int mtk_pcie_power_up(struct mtk_pcie_port *port)
> > +{
> > +	struct device *dev = port->dev;
> > +	int err;
> > +
> > +	port->phy_reset = devm_reset_control_get_optional(dev, "phy-rst");
> 
> Please use devm_reset_control_get_optional_exclusive() instead.
> 
> > +	if (PTR_ERR(port->phy_reset) == -EPROBE_DEFER)
> > +		return PTR_ERR(port->phy_reset);
> 
> This should be
> 
> 	if (IS_ERR(port->phy_reset))
> 		return PTR_ERR(port->phy_reset);
> 
> there is no reason to continue if this throws -ENOMEM, for example.
> 
> regards
> Philipp

Thanks for your review, I will fix it in the next version.