[PATCH 1/2] Include mt8183-reset.h and add reset-cells in infracfg in dtsi file.

Matthias Brugger matthias.bgg at gmail.com
Thu Aug 22 07:33:25 PDT 2019



On 25/07/2019 10:09, Yong Liang wrote:
> From: "yong.liang" <yong.liang at mediatek.com>
> 

Missing commit message.
Subject could be shorter, something like:
arm64: dts: add reset-cells for infracfg

> Change-Id: I46e0aca76a206ac86ee0477d9dbd67e1e924b118

Please delete Change-Id it's not meaning full for upstream work.

> Signed-off-by: yong.liang <yong.liang at mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 08274bfcebd8..2589e9461c6e 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -8,6 +8,7 @@
>  #include <dt-bindings/clock/mt8183-clk.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/reset-controller/mt8183-resets.h>
>  
>  / {
>  	compatible = "mediatek,mt8183";
> @@ -194,6 +195,7 @@
>  			compatible = "mediatek,mt8183-infracfg", "syscon";
>  			reg = <0 0x10001000 0 0x1000>;
>  			#clock-cells = <1>;
> +			#reset-cells = <1>;
>  		};
>  
>  		apmixedsys: syscon at 1000c000 {
> 



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